Low cost and highly reliable chip-sized package

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

257737, 257738, 257673, 257670, 257787, 257693, 22818022, 174 524, H01L 2348, H01L 2350, H01L 2328

Patent

active

059259345

ABSTRACT:
The invention is directed to a chip-sized package (CSP) and method for making a CSP which is simple to manufacture, less costly and more compact, thus being truly a chip-sized package. The inventive CSP has a chip that has an array of chip ports on an active surface, such as an array of solder or metal bumps or any other conductive material. The chip may be held in a cavity of a frame by a pair of frame tie-bars. An encapsulant encapsulates the chip and portions of the chip ports located near the active surface, leaving portions of the chip ports located away from the active surface exposed. Package ports, such as solder balls may be attached to the portions of the chip ports located away from the active surface and used to attach the CSP to a printed circuit board. Various methods are used to leave portions of the chip ports located away from the active surface exposed from the encapsulant. The encapsulant may be removed by laser or grinding to expose portions of the chip ports. Alternatively, prior to encapsulation, the chip ports are positioned to sit on a mold, so that removing the mold leaves exposed the portions of the chip ports that were in contact with the mold. The mold may have an array of mold bumps or mold pockets upon which the chip ports sit. Removing the mold, exposes portions of the chip ports and leaves an array of openings in the encapsulant. Another method to form the array of openings in the encapsulant and expose portions of the chip ports uses an array of pins that are inserted in the encapsulant before it cures. The pins are inserted to contact the chip ports. Retracting the array of pins forms the array of openings in the encapsulant and exposes portions of the chip ports that were in contact with the pins.

REFERENCES:
patent: 5019673 (1991-05-01), Juskey et al.
patent: 5120678 (1992-06-01), Moore et al.
patent: 5274913 (1994-01-01), Grebe et al.
patent: 5461197 (1995-10-01), Hiruta et al.
patent: 5468995 (1995-11-01), Higgins, III
patent: 5483421 (1996-01-01), Gedney et al.
patent: 5554887 (1996-09-01), Sawai et al.
patent: 5641113 (1997-06-01), Somaki et al.
patent: 5656863 (1997-08-01), Yasunaga et al.
patent: 5666008 (1997-09-01), Tomita et al.
patent: 5731631 (1998-03-01), Yama et al.
Patent Abstract of Japan, vol. 95, No. 3, Apr. 28 1995 and JP 6-342794 A Mitsubishi Electric Corp., Dec. 1994, Japan.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Low cost and highly reliable chip-sized package does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Low cost and highly reliable chip-sized package, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low cost and highly reliable chip-sized package will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1324202

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.