Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2003-03-31
2004-08-31
Chen, Jack (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
Reexamination Certificate
active
06784498
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an ESD protection device, and particularly to a low capacitance ESD protection device and a manufacturing method thereof applicable to RF circuits.
2. Description of the Prior Art
In recent years, extensive research has been carried out on the possibility of using pure CMOS, rather than bipolar or BiCMOS technologies, for RF applications. It is forecasted that by 2003, a large number of applications will use CMOS technology for RF system-on-chip, such as remote control, radio modems, home system automation, etc. For example, in the home system automation, the concept is to replace the data cable between appliances by wireless link centered at 2.4 GHz, with a range of approximately 8 m. The reliability of the components used in these applications is therefore obviously very important.
One of the major bottlenecks for the transition from bipolar/BiCMOS to pure CMOS is the immunity of the circuits against Electro-Static Discharge (ESD). The detrimental effects of ESD in sub-micron devices have been widely known and reported. Further, the use of pure CMOS imposes a greater demand for adequate protection circuitry against ESD, due to the greater sensitivity of CMOS for electrical overstress in general and ESD in particular. RF circuits typically require a high performance and have tight design specifications. The conventional approach to achieve higher device ESD robustness is to incorporate on-chip ESD protection networks, as well as, in many cases external protection elements. As shown in
FIG. 1
, the standard approach to on-chip ESD protection involves incorporating protection at inputs, outputs, which consist of elements such as diodes, nMOSFETs, etc., provide a known current path to the ESD pulse away from the core circuitry. In the classical sub-micron CMOS technology devices, this common approach could yield enough ESD robustness if the protection circuits are implemented properly.
FIGS.
1
~
3
are diagrams respectively showing three conventional ESD protection devices for CMOS, which are disclosed in “ESD Reliability Issues in RF CMOS Circuits”, M. K. Radhakrishnam, V. Vassilev, B. Keppens, V. De Heyn, M. Natarajan, and G. Groeseneken.
FIG. 1
shows a cross-section of a ggnMOS (gate grounded nMOS) used for ESD protection. It includes a p substrate
11
, isolation layer
12
, n source and drain regions
131
and
132
, p doped region
14
, and a gate
15
. The p doped region
14
couples the p substrate
11
to a cathode. The source region
131
and gate
14
are also coupled to the cathode. The drain region
132
is coupled to an anode.
FIG. 2
show a cross-section of an oxide-isolated diode used for ESD protection. It includes a p substrate
21
, oxide layer
22
, a n or p well
23
, n doped region
241
and p doped region
242
in the well
23
, and poly-silicon layer
25
. The p doped region
242
and n doped region
241
are respectively the cathode and anode of the diode.
FIG. 3
shows a cross-section of a LVTSCR (low voltage triggered silicon controlled rectifier) used for ESD protection. It includes a p substrate
31
, isolation layer
32
, a transistor formed by an n source region
331
, n drain region
332
and gate
34
, p doped region
35
, a n well
36
, and n doped region
371
and p doped region
372
in the n well
36
. The gate
34
, source region
331
and p doped region
35
are coupled to the cathode while the n doped region
371
and n doped region
372
are coupled to the anode.
The previously described ESD protection devices provide ESD path between their cathode and anode. The cathode and anode may be coupled to power lines or I/O pads.
However, for RF applications, the parasitic capacitance and the series resistance of the ESD protection structure directly impacts the RF performance. For example, an unaccounted parasitic capacitance of 1 pF from an ESD protection network or device at 2.4 GHz corresponds to a load of 66 Ohms. It is important to note that the typical input pin capacitance specification for a Low Noise Amplifier used in the 1-5 GHz is less than 100 fF.
Obviously, it degrades the performance of the RF circuits if the conventional ESD protection devices for pure CMOS are applied.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a low capacitance ESD protection device and a manufacturing method thereof applicable to RF circuits.
The present invention provides a low capacitance ESD protection device. The device comprises a substrate, a well of a first conductivity type in the substrate, a first and second transistor of the first conductivity type respectively on two sides of the well, a guard ring of a second conductivity type in the substrate, surrounding the well, and the first and second transistor, and a doped region of the second conductivity type in the well, wherein profiles of a drain and source region of each of the first and second transistor are un-symmetrical.
The present invention further provides a method for manufacturing a low capacitance ESD protection device. The method comprises the steps of providing a substrate, forming a well of a first conductivity type in the substrate, forming a first and second transistor of the first conductivity type respectively on two sides of the well, wherein profiles of a drain and source region of each of the first and second transistor are un-symmetrical, forming a guard ring of a second conductivity type in the substrate, surrounding the well, and the first and second transistor, and forming a doped region of the second conductivity type in the well.
The present invention provides another low capacitance ESD protection device. The device comprises a substrate, a well of a first conductivity type in the substrate, a first and second transistor of the first conductivity type respectively on two sides of the well, a guard ring of a second conductivity type in the substrate, surrounding the well, and the first and second transistor, and a doped region of the second conductivity type in the well, wherein, for each of the first and second transistor, a width of a drain region is substantially equal to that of a source region and a length of the drain region is shorter than that of the source region.
The present invention also provides an integrated circuit comprising a core circuit, and a low capacitance ESD protection device protecting the core circuit from ESD damages. The low capacitance ESD protection device comprises a substrate, a well of a first conductivity type in the substrate, a first and second transistor of the first conductivity type respectively on two sides of the well, a guard ring of a second conductivity type in the substrate, surrounding the well, and the first and second transistor, and a doped region of the second conductivity type in the well, wherein profiles of a drain and source region of each of the first and second transistor are un-symmetrical.
REFERENCES:
patent: 5675168 (1997-10-01), Yamashita et al.
patent: 5714784 (1998-02-01), Ker et al.
patent: 5955763 (1999-09-01), Lin
patent: 6097066 (2000-08-01), Lee et al.
patent: 6259139 (2001-07-01), Pan
patent: 6420761 (2002-07-01), Gauthier et al.
patent: 6448123 (2002-09-01), Lee et al.
patent: 6611025 (2003-08-01), Lin
patent: 6621133 (2003-09-01), Chen et al.
patent: 2003/0047786 (2003-03-01), Lee et al.
“ESD Reliability Issues in RF CMOS Circuits” Radhakrishnan, et al., IMEC Web Site, Mar. 2002, 6 pages.
Lee Jian-Hsing
Wu Yi-Hsun
Chen Jack
Smoot Stephen W.
Taiwan Semiconductor Manufacturing Co. Ltd.
Thomas Kayden Horstemeyer & Risley
LandOfFree
Low capacitance ESD protection device and integrated circuit... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Low capacitance ESD protection device and integrated circuit..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low capacitance ESD protection device and integrated circuit... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3288915