Long range ordered semiconductor interface phase and oxides

Details Long range ordered semiconductor interface phase and oxides Long range ordered semiconductor interface phase and oxides

2000-10-19

2003-09-02

Ghyka, Alexander (Department: 2812)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

C438S697000, C438S770000, C438S958000, C257S629000

Reexamination Certificate

active

06613677

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to oxides grown on the surface of a substrate, more specifically to epitaxial oxides grown on the surface of semiconductors, and to the interface formed between the oxide and the semiconductor.
BACKGROUND OF THE INVENTION
Ever since the first integrated circuit was demonstrated, one goal of the electronics industry has been to increase the density of individual devices in an integrated circuit. The smaller the device, the faster the conduction across the device. Ultimately, as smaller devices are made, the devices can be packed more densely, which reduces transmission between devices and also allows for faster operation.
Metal oxide semiconductor (MOS) technology forms the basis for a large part of chip manufacturing. In typical MOS transistor technology, SiO
2
is grown so as to form part of a metal oxide semiconductor gate. SiO
2
SO formed is commonly referred to as a gate oxide or a gate oxide dielectric. Until the time of this invention, SiO
2
grown on MOS transistor gates has always been thought of as amorphous with little ordering in the first atomic layers at the interface between the silicon substrate and the oxide layer.
When the semiconductor material is not silicon, i.e., it is one of the multi-element semiconductors (e.g. Si
x
Ge
1−x
or GaAs) or germanium, the growth of an oxide layer is problematic. For instance, a multi-element semiconductor containing Si, when exposed to oxidation, tends to form a silicon oxide material at the surface, but below the silicon oxide layer the other material becomes more prevalent at the interface since the silicon there is depleted by its reaction with oxygen to form the oxide. This creates defects and changes the electrical characteristics of the interface.
Silicon has deficiencies as a semiconductor material when compared to some multi-element semiconductor material. However, silicon is used commercially as a semiconductor preferentially over other materials because it readily forms stable oxide dielectric layers with a lower interface defect density than other semiconductors and their oxides. The stability of Si/SiO
2
having a low interface defect density enables the manufacture of transistors with better electrical properties than is attainable with other semiconductors.
The desire for lower dimension devices presents a basic problem: as devices get smaller in three dimensions, the dielectric layer must get both narrower and thinner and continue to function as a dielectric. Silicon does not always provide the optimum physical and electronic properties, such as a low interface defect density or a high dielectric constant, necessary to or tailored to fill a particular need. A desire for materials that have better tailored physical and electronic properties creates another problem: growth of dielectric layers on multi-element semiconductors is difficult. These two problems become essentially insurmountable when one desires a small device made out of a semiconductor other than doped silicon. Conceptually, a solution would lie in producing either a well-ordered ultra-thin oxide on top of the multi-element semiconductor, or at least a more ordered interface between the semiconductor and the dielectric layers. Doing so without elemental or phase separation is extremely difficult especially in chemical systems where the defect generation rate is higher than silicon, and as the physical sizes involved approach atomic dimensions. Any improvement in ordering at the interface or in the material will improve the interface defect density. It will be appreciated that, as smaller devices demand thinner dielectric layers, interface characteristics become increasingly important.
Another goal of electronic device processing is the growth of heterodielectrics or other materials listed below on a semiconductor substrate. While this goal is achievable for some systems, in general, growth of ordered films of a material on a semiconductor substrate is difficult.
FIG. 1A
shows a diagram depicting a gate structure, a common configuration of components in a semiconductor device, in conjunction with an energy diagram
190
. This diagram illustrates the relative energies for several critical parameters: the conduction band (E
c
), the intrinsic Fermi level (E
F,i
), the Fermi level (E
f
) and the valence band (E
c
). In this figure SiO
2
(
171
) is exhibiting an ideal interface with silicon. The defect-free interface does not capture electrons in the conduction path
175
of the p-type semiconductor
177
. The energy diagram
190
clearly shows that the bands are flat for ideal SiO
2
.
FIG. 1B
also depicts the arrangement as described in FIG.
1
A. In this case, SiO
2
179
has defects. These defects cause the bands to bend as seen in
192
, for example electrons
181
(represented as minus signs) along the SiO
2
/Si interface can be captured by these defects, thus decreasing conduction in the n-channel
177
.
In
FIG. 1C
, a voltage is applied to the gate structure
183
. Though the SiO
2
/Si interface
185
has defects, the applied voltage, V
gate
, attracts electrons at the SiO
2
/Si interface
185
, and fills the defects (also called electron traps) at the interface. Therefore, extra conduction electrons can then flow unhindered, furthermore the bands now appear flat.
Disordered interface layers in the interfacial region, as discussed above, bring forth several effects. Disorder increases the interface defect density which causes a change in the electronic structure of the bands at the interface; the bands bend. The bands in the material form from the overlap of each constituent atom's atomic orbitals. In a defect-free, non-molecular three dimensional solid, continuous bands can extend across the entire solid. In this case, a conduction band would provide a continuous path across the material. See FIG.
1
A.
Any defect, such as a dislocation or a point, line, or planar defect, in the solid or at an interface, breaks the continuous nature of the bands because the energy of electronic orbitals of atoms on one side of the defect no longer align with the energy of orbitals of atoms on the other. This difference in alignment in the relative energies of the orbitals results in different energy levels for the overlapping orbitals. The energy levels of the continuous bands are defined by the degree of local overlap between the atomic orbitals. When the defect is an elemental impurity, the situation is more complicated. Explained simplistically, the orbitals of the impurity atom occupy different energy levels which cause the electrons to occupy energy levels outside of the bands. Because of the manner in which the atomic levels combine to form bands, the local perturbation in energy levels for dislocations and impurity defects or any type of point, line or planar defects, as described above, results in a local perturbation of the energy levels inside or outside of the bands. Extra, discreet energy levels appear which can result in band bending. See FIG.
1
B. Band bending, because it provides additional energy levels in the conduction or the valence bands, can trap conduction electrons or holes. Electrical carriers are referred to as trapped because, in addition to the electrical force generated by the applied potential that causes conduction, an additional potential must also be applied to dislodge these trapped electrons and cause them to move.
To an extent, the interface between the dielectric layer on the surface of a semiconductor and the semiconductor itself acts like a defect. While it provides a discontinuity in the conduction band itself, the interface, if not ideal or perfect, causes the conduction band in the semiconductor material to be perturbed and therefore, produces band bending. Defects in the dielectric near the interface can also perturb the bands in the semiconductor. Band bending at the interface interferes with the flow of conduction electrons in the region of the semiconductor material immediately below the interface. As devices made from semiconductors become smaller, the i

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