Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-07-03
2007-07-03
Lamarre, Guy (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S782000, C714S756000, C365S158000
Reexamination Certificate
active
10635150
ABSTRACT:
A logical data block in a MRAM is disclosed. The logical data block comprises magnetic memory cells formed at intersections of hard-axis generating conductors and an easy-axis generating conductor. The logical data block may further be configured in size by a preselected, block-based error correction code. A magnetic memory module and computer system including a MRAM having a logical data block according to embodiments of the present invention are also disclosed. Additionally, a method embodiment of reducing half-select write errors within a MRAM is disclosed.
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Hilton Richard L.
Pemer Frederick A.
Smith Kenneth K.
Alphonse Fritz
Lamarre Guy
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