Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
Patent
1997-05-21
2000-08-29
Santamauro, Jon
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Signal level or switching threshold stabilization
326 83, 326121, H03K 1716
Patent
active
061114278
ABSTRACT:
A logic circuit having a first logic gate and the remaining logic gate or gates. The first logic gate is interposed in a signal path determining an operating speed, and includes at least one first MOS transistor which has a threshold voltage lower than a predetermined voltage and operates at a high speed. The remaining logic gate or gates include at least one of a second MOS transistor and a third MOS transistor as a transistor having a margin for operating speed. The second MOS transistor has a middle threshold voltage equal to or greater than the predetermined voltage, and the third MOS transistor has a high threshold voltage equal to or greater than the predetermined voltage. The power consumption of the entire logic circuit at the time of operation is reduced, while maintaining the maximum operating speed.
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ISSCC96/Session 5/Technology Directions: High Speed, Low Power/Paper TP 5. TP:5.4 A 0.5V Simox-MTCMOS Circuit with 200ps Logic Gate; Takakuni Douseki, et al., 1996 IEEE International Solid-State Circuits Conference; pp. 84-85, 66-67, and 364-365.
Douseki Takakuni
Fujii Koji
Frank Robert J.
Gluck Jeffrey W.
Le Don Phu
Nippon Telegraph and Telephone Corporation
Santamauro Jon
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