Logic built-in self test (BIST)

Details Logic built-in self test (BIST) Logic built-in self test (BIST)

2005-06-07

2005-06-07

Dildine, R. Stephen (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S030000

Reexamination Certificate

active

06904554

ABSTRACT:
An apparatus comprising a plurality of flip-flops each comprising (i) a first input, (ii) a second input and (iii) an output, where (a) each of the outputs are coupled to the first input of a subsequent flip-flop to form a chain, (b) the first input of a first of the flip-flops receives a pattern signal, (c) each of the second inputs receives a respective first logic signal, and (d) each of the outputs presents a respective second logic signal in response to the signals received at the first and second inputs, a pattern generator configured to generate the pattern signal, and a checking circuit configured to generate a check signal in response to the second logic signal of a last of the flip-flops. The pattern signal and the first logic signals are generally selected to influence a behavior of the apparatus.

REFERENCES:
patent: 6308290 (2001-10-01), Forlenza et al.
patent: 6327685 (2001-12-01), Koprowski et al.
Kakaroudas, A.P. et al.; Hardware and Power Requirements of Self-checking circuits; Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on, vol. 3, 5-8 Sep. 1; pp.: 1655-1658.
Pagey, S., Al-Khalili, A.J.; Application of byte error detecting codes to the design of self-checking circuits; Test Symposium, 1994., Proceedings of the Third Asian, Nov. 15-17, 1994; pp.: 39-44.

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