Local charge and work function engineering on MOSFET

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S410000, C257S411000, C257S407000, C257S388000, C257S364000

Reexamination Certificate

active

08030718

ABSTRACT:
The present disclosure provides a semiconductor device. The semiconductor device includes a semiconductor substrate having a source region and a drain region, defining a first dimension from the source to drain; and a gate stack disposed on the semiconductor substrate and partially interposed between the source region and the drain region. The gate stack includes a high k dielectric layer disposed on the semiconductor substrate; a first metal feature disposed on the high k dielectric layer, the first metal gate feature having a first work function and defining a second dimension parallel with the first dimension; and a second metal feature having a second work function different from the first work function and defining a third dimension parallel with the first dimension, the third dimension being less than the second dimension.

REFERENCES:
patent: 6727560 (2004-04-01), Pan et al.
patent: 6861712 (2005-03-01), Gao et al.
patent: 6921711 (2005-07-01), Cabral et al.
patent: 7361561 (2008-04-01), Goolsby et al.
patent: 2003/0216038 (2003-11-01), Madhukar et al.
patent: 2006/0008968 (2006-01-01), Brask et al.
patent: 2006/0278934 (2006-12-01), Nagahama
patent: 1881590 (2006-12-01), None
Chinese Patent Office, Office action dated Jul. 14, 2010, Application No. 200910169146.8, 5 pages.

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