Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2008-09-16
2008-09-16
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C430S005000
Reexamination Certificate
active
11485554
ABSTRACT:
A lithography simulation method includes: taking in design data of a pattern to be formed on a substrate and mask data to prepare a mask pattern used in forming a latent image of the pattern on the substrate by transmission of an energy ray; obtaining the latent image of the pattern by calculation of an intensity of the energy ray; locally changing, at least in a portion corresponding to a pattern of interest, a relative position in a direction of the intensity of the energy ray between a latent image curve and a reference intensity line in accordance with a distance between the pattern of interest and a pattern of a neighboring region , the latent image curve being an intensity distribution curve of the energy ray constituting the latent image, the reference intensity line being defined to specify a position of an edge of the pattern of interest; and calculating a distance between intersections of a portion of the latent image curve corresponding to the pattern of interest and the reference intensity line in the changed relative position to define a line width of interest of the pattern of interest.
REFERENCES:
patent: 5563012 (1996-10-01), Neisser
patent: 5889686 (1999-03-01), Mimotogi et al.
patent: 6617083 (2003-09-01), Usui et al.
patent: 7363611 (2008-04-01), Rosenbluth
Kotani Toshiya
Mimotogi Shoji
Nojima Shigeki
Chiang Jack
Dimyan Magid Y
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
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