Link instruction register providing test control signals to...

Details Link instruction register providing test control signals to... Link instruction register providing test control signals to...

2005-04-05

2005-04-05

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

06877122

ABSTRACT:
A separate link instruction register is connected in series in a test data and instruction data scan path on an IC. Instruction data shifted into the register provides control signals and selective enable signals for testing one selected core wrapper of plural core wrappers on the IC. Test data passes around the link instruction register. The control signal include a clock signal, a shift signal, a capture signal, and a update signal. The control signals also include an enable signal for each core wrapper. Additional link instruction registers may be arranged in a hierarchy for testing cores embedded within other cores.

REFERENCES:
patent: 5889788 (1999-03-01), Pressly et al.

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