Line driver

Details Line driver Line driver

2006-04-18

2006-04-18

Tran, Anh Q. (Department: 2819)

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Field-effect transistor

C326S126000, C326S127000

Reexamination Certificate

active

07030660

ABSTRACT:
A line driver which is especially suitable for wirebound data transmission at high bit rates, comprising several parallel-connected driver stages (3) respectively comprising a first pair of transistors consisting of two transistors (4, 5) which are controlled in a differential manner according to digital data to be transmitted, and a second pair of transistors (4, 5). The transistors belonging to the second pair of transistors (6, 7) are series-connected to a corresponding transistor (4, 5) of the first pair of transistors. The individual driver stages (3) are connected by the transistors (6, 7) of the second pair of transistors in a parallel manner to both the terminals of the line driver. Each driver stage (3) is associated with a control circuit (2) with transfer gates (14, 15), producing the differential control signals (VGA, VGB) for the two transistors (4, 5) of the corresponding first pair of transistors.

REFERENCES:
patent: 5945847 (1999-08-01), Ransijn
patent: 5966382 (1999-10-01), Fawal et al.
patent: 6687286 (2004-02-01), Leonowich et al.
patent: 2002/0090034 (2002-07-01), Lu
patent: 0 078 347 (1981-10-01), None
A. Shoval, O. Shoaei, and R. Leonowich, “A Combined 10/125Mbaud Twisted-Pair Line Driver with Programmable Performance/Power Features”, Session 18, Wireline Communications, 2000 IEEE International Solid-State Circuits Conference, (2 page).
R. Mahadevan ans D. Johns, “A Differential 160-MHz Self-Terminating Adaptive CMOS Line Driver”, IEEE Journal of Solid-State Circuits, vol. 35, No. 12, Dec. 2000, (6 pages).

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