Level shifting circuit and method reducing leakage current

Electronic digital logic circuitry – Interface – Supply voltage level shifting

Reexamination Certificate

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C326S068000

Reexamination Certificate

active

07439772

ABSTRACT:
A level shifting circuit and method that reduce leakage current are provided. The level shifting circuit includes: a logic circuit including a plurality of MOSFETs (metal-oxide-semiconductor field effect transistors) connected in series between an output terminal and a source, receiving an input signal having a first logic level and a second logic level, changing the input signal to a signal having a first logic level and a third logic level in response to a feedback signal supplied to one of the MOSFETs, and outputting the changed signal as an output signal; and a feedback circuit generating the feedback signal in response to the output signal.

REFERENCES:
patent: 5317213 (1994-05-01), Sato et al.
patent: 6768367 (2004-07-01), Meadows et al.
patent: 6903576 (2005-06-01), Narwal
patent: 2002/0113616 (2002-08-01), Shimazaki et al.
patent: 2002/0159302 (2002-10-01), Helmut et al.
patent: 08-335126 (1996-12-01), None
patent: 2003-258621 (2003-09-01), None
patent: 1999-0057767 (1999-07-01), None
English language abstract of the Japanese Publication No. 08-335126, Dec. 17, 1996.
English language abstract of the Japanese Publication No. 2003-258621, Sep. 12, 2003.
English language abstract of Korean Publication No. 1999-0057767, Jul. 15, 1997.

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