Level shifter and data output buffer having same

Details Level shifter and data output buffer having same Level shifter and data output buffer having same

1994-07-12

1995-11-14

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Including level shift or pull-up circuit

36518906, 365194, 326 66, 326 73, G11C 700, H03K 1902

Patent

active

054673135

ABSTRACT:
A level shifter and a data output buffer adapted for use in a semiconductor memory device including a memory cell for storing data, a sense amplifier for amplifying data read from the memory cell and generating an ECL-level output signal, and a level shifter for converting the ECL-level output signals into a CMOS-level signal, wherein the level shifter has a level shifting means receiving the ECL-level data signals, converting the input data to CMOS-levels, and outputting a result, and a delay for delaying the result so as to control its current consumption of the level shifter.

REFERENCES:
patent: 4897820 (1990-01-01), Shiomi et al.
patent: 4964083 (1990-10-01), Nogle et al.
patent: 4972374 (1990-11-01), Wang et al.
patent: 5027323 (1991-06-01), Miyamoto et al.
patent: 5153465 (1992-10-01), Sandhu
patent: 5162677 (1992-11-01), Takahashi
patent: 5210715 (1993-05-01), Houston

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