Leadframe-over-chip having off-chip conducting leads for increas

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame

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Details

257691, 257692, 257784, H01L 2352, H01L 2348, H01L 2940

Patent

active

055459200

ABSTRACT:
A hybrid leadframe-over-chip (LOC) semiconductor package is generally comprised of bonding finger elements located over a surface of a semiconductor component and electrically coupled, by means of conducting wires, to the bonding pads located on the surface. In addition, at least one bonding finger is located outside the boundary of the surface of the semiconductor component. Each bonding finger located outside the boundary is coupled, by a conducting wire, to a bonding pad positioned within the boundary of the semiconductor component. In this manner, for a given semiconductor component size and for given routing and lead dimension constraints, a larger number of conducting paths can be provided between the leadframe and the semiconductor component.

REFERENCES:
patent: 5250840 (1993-10-01), Oh et al.
patent: 5287000 (1994-02-01), Takahashi et al.
patent: 5428247 (1995-06-01), Sohn et al.

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