Lead silicate based capacitor structures

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Details

438239, 257295, 3613214, H01L 2976, H01L 2994, H01L 31062

Patent

active

060906596

ABSTRACT:
A capacitor and method of making is described incorporating a semiconductor substrate, a bottom electrode formed on or in the substrate, a dielectric layer of barium or lead silicate, and a top electrode. A sandwich dielectric of a barium or lead silicate and a high dielectric constant material such as barium or lead titanate may comprise the dielectric. The silicate layer may be formed by evaporating and diffusing, ion implanting, or electroplating and diffusing barium or lead. The high epsilon dielectric constant material may be formed by sol gel deposition, metal organic chemical vapor deposition or sputtering. The invention overcomes the problem of a bottom electrode and dielectric layer which chemically interact to form a silicon oxide layer in series or below the desired dielectric layer.

REFERENCES:
patent: 3977887 (1976-08-01), McIntosh
patent: 4772985 (1988-09-01), Yasumoto et al.
patent: 5471364 (1995-11-01), Summerfelt et al.

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