Lead frame structure

Details Lead frame structure Lead frame structure

1999-08-10

2001-03-20

Potter, Roy (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

With structure for mounting semiconductor chip to lead frame

C257S669000

Reexamination Certificate

active

06204553

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a lead frame structure. More particularly, the present invention relates to a lead frame structure having a cooling surface that can enhance the cooling capacity of a semiconductor package.
2. Description of Related Art
As semiconductor manufacturing continues to make progress, the level of integration of integrated circuit (IC) devices and hence computational speed will increase. When the devices in a silicon chip is in operation, a great amount of heat is generated. If the integrated circuit rises above a certain permissible range of temperature, some of the integrated circuit devices within the chip may produce errors. When the devices are seriously overheated, they may even be permanently damaged. Hence, how to lower the working temperature of (IC) devices becomes an important manufacturing consideration. A metallic lead frame inside a package is in direct contact with a silicon chip. Because metal is a good thermal conductor, most packages have a portion of the metallic lead frame exposed so that cooling rate can be increased.
FIG. 1
is a schematic, cross-sectional diagram showing a conventional semiconductor package with a lead frame inside. As shown in
FIG. 1
, the lead frame
16
inside the semiconductor package
10
includes a die pad
12
and a plurality of leads
14
. Each lead
14
can be divided into an inner lead portion
18
and an outer lead portion
20
. The die pad
12
is formed on a surface at a different height level from the inner lead portion
18
. After molding, the inner lead portion
18
of the lead frame
16
is enclosed by packaging material
30
while the backside of the die pad
12
is exposed. The method of forming a semiconductor package involves the step of attaching a silicon chip
22
to a die pad
12
. A wire-bonding operation is next carried out to connect from the bonding pads on the chip
22
to the leads
14
on the lead frame
16
using metallic wires
26
. The silicon chip and the lead frame
16
are placed inside a set of mold such that the bottom surface of the die pad
12
is in direct contact with a bottom mold piece. Molding material
30
is injected into the mold so that only the outer lead portions
68
and the bottom surface
28
of the die pad are exposed. Finally, the leads are trimmed and formed to create a complete package.
When molding material
30
is injected into the mold, the mold and the die pad
12
may not form a perfect seal. Hence, some of the molding material
30
may leak through crevices between the mold and the bottom surface
28
of the die pad
12
and then spread over the entire bottom surface
28
. Because the molding material
30
is a poor conductor of heat, cooling area will be greatly reduced and hence less heat will be carried away from the silicon chip
22
. To return the cooling rate to the intended level, molding material on the die pad surface
28
has to be removed by polishing. However, this will increase the processing time and incur additional production cost.
SUMMARY OF THE INVENTION
The present invention provides a lead frame structure for a semiconductor package that can increase the cooling rate and preventing the formation of residual molding material on cooling surface, thereby improving the quality of the semiconductor package and lowering the production cost.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a lead frame structure for a semiconductor package. The lead frame has a die pad. One surface of the die pad supports a silicon chip while the other surface of the die pad is a cooling surface. The cooling surface of the die pad has a plurality of annular trenches. All of the annular trenches have identical geometric center. The die pad area is surrounded by a plurality of inner leads and outer leads. The leads are formed on a planar surface at a different height level from the die pad so that the bottom surface of the die pad will be exposed after packaging. Because die surface with annular trenches is in contact with the mold, any leakage of molding material is likely to be trapped inside one of the annular trenches instead of spreading over the entire pad surface. Furthermore, the additional annular trenches on the die pad increase the total cooling surface, and hence more heat will be carried away from the package.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 4918511 (1990-04-01), Brown
patent: 5278446 (1994-01-01), Nagaraj et al.
patent: 5712507 (1998-01-01), Eguchi et al.

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