Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Patent
1999-05-20
2000-12-12
Niebling, John F.
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
438106, 438121, H01L 2144, H01L 2148, H01L 2150
Patent
active
061597759
ABSTRACT:
An object of this invention is to effectively prevent a progress of corrosion due to a local cell produced between a copper raw material (30) of a lead frame and a plating layer (29) on the surface, secure an anchor effect necessary for a chip loading surface without providing a palladium or palladium alloy film (29) with an excessive thickness and improve the reliability of a semiconductor device while achieving a reduction of production cost of a semiconductor device.
Ground plating layers (27), (28) of multilayer structure of nickel are formed entirely on the surface of the raw material and then the palladium or palladium alloy plating layer (29) is formed on the surface thereof. A first ground plating layer (27) is formed so as to have an elaborate quality by supplying a DC current of a predetermined current value thereto as a plating current. A second ground plating layer (28) is formed so as to have a precedence in growth of crystal in the vertical direction by supplying a current such as a pulse current, in which its current value changes as a plating current.
Kakimoto Mitsuyuki
Kazuto Akagi
Umeda Yasushi
Kananen Ronald P.
Niebling John F.
Noge Electronic Industries Co., Ltd.
Sony Corporation
Sumitomo Metal & Mining Co., Ltd.
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