Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With bumps on ends of lead fingers to connect to semiconductor
Reexamination Certificate
1997-08-27
2001-07-31
Williams, Alexander O. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With bumps on ends of lead fingers to connect to semiconductor
C257S666000, C257S676000, C257S672000, C257S783000, C361S760000, C174S050510
Reexamination Certificate
active
06268646
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a lead frame used for a semiconductor device, and more particularly, to a lead frame for lead on chip (LOC) used in the semiconductor device to which the molded packaging is conducted with the LOC structure.
BACKGROUND OF THE INVENTION
As a lead frame used for the semiconductor device having the LOC structure and the like which is capable of high density packaging, there is a lead frame in which a thermoplastic or thermosetting adhesive layer (consisting of a high heat-resistant and insulative film having a thickness about 50 &mgr;m and adhesives having about 25 &mgr;m applied on the both surfaces of the film) is formed on one or both faces of the lead frame, and then a semiconductor chip is heated and pressurized to be mounted on the surface of thermoplastic or thermosetting adhesive layer.
In the lead frame, a polyimide film has usually been used for the high heat-resistant and insulative film, and a method for punching the film and applying the punched film to the lead frame has been adopted. Concretely, the film is applied to the lead frame by punching the reel-like wound film to a required shape with a metal tool having a punch and a die, and heating and pressurizing this punched film to the lead film.
However, this method needs a large amount of the film tape used thereby resulting in the increase in cost as well as the waste of the film material due to the punched film refuse. In addition, a crack in the package may develop due to moisture absorption of the polyimide film.
In order to solve such disadvantages, a method for applying a thermoplastic adhesive in the form of varnish to the semiconductor chip mounting area such as the leading edges of respective inner leads and the like on the lead frame using a dispenser has been developed. In particular, in the case of applying an adhesive to the leading edges of the leads, the method of spot application of the adhesive is used. Only a required amount of the adhesive is applied onto the lead frame, so that the remainder of the material does not generate and it does not need an expensive metal mold, resulting in a low production cost.
The application of the varnish-like adhesive is conducted by delivering or emitting the adhesive from a fine needle or nozzle with air pressure to predetermined portions of the lead frame while moving the needle onto the lead frame.
The lead frame has a plurality of inner leads which are centralized to a semiconductor chip-mounting portion and disposed in such a way that they are opposed each other, a plurality of outer leads which are connected to the respective inner leads and disposed in parallel each other, a pair of tie bars which are disposed to connect the respective outer leads on the outside of a resin for sealing the outer leads, and a pair of frame members disposed on both sides thereof to support the tie bars, respectively.
In the lead frame of such a structure, an insulative adhesive is applied to the respective leading edges of the inner leads by the method described above. While heating such inner leads with a heater, the semiconductor chip (not shown) is positioned in a mounting region or area and then the semiconductor chip is pressure-bonded to the insulative adhesive to fix the semiconductor chip thereto. Then, resin molding is applied to the semiconductor chip and inner leads, and the outer leads are bent in required form after cutting them at given positions to complete a semiconductor device.
However, according to the conventional lead frame for LOC, when the insulative adhesive is applied to the lead frame with a dispenser, the region which can be applied with one needle at one time is relatively narrow, so that the adhesive is applied only on a part of the back of the lead silver-plated for wire bonding. As a result, the application of the adhesive is conducted only on the limited area of the lead thereby resulting in an unstable bonded state of the semiconductor chip onto the lead frame. When the resin molding is carried out on the unstably bonded semiconductor chip, the semiconductor chip on the lead frame may incline upon molding, so that resin molding can not be carried out, and unreliable semiconductor devices are fabricated.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the invention to provide a lead frame for lead on chip having an improved stability in the adhesion between a semiconductor chip and a lead, and a stable resin molding.
According to the present invention, a lead frame for lead on chip, comprises: a plurality of inner leads to be connected to a semiconductor chip; a plurality of outer leads to be connected to an outer circuit; and insulative adhesives provided on a plurality of longitudinal positions in a region of said inner leads for mounting a semiconductor chip.
REFERENCES:
patent: 5234866 (1993-08-01), Okinaga et al.
patent: 5536970 (1996-07-01), Higashi et al.
patent: 5559305 (1996-09-01), Lee et al.
patent: 5677566 (1997-10-01), King et al.
patent: 5714405 (1998-02-01), Tsubosaki et al.
patent: 5744827 (1998-04-01), Jeong et al.
patent: 5767571 (1998-06-01), Fimura et al.
patent: 5804874 (1998-09-01), An et al.
patent: 5880522 (1999-03-01), Yonemoto et al.
patent: 5897339 (1999-07-01), Song et al.
patent: 5917242 (1999-06-01), Ball
patent: 5945729 (1999-08-01), Stroupe
patent: 5960258 (1999-09-01), Moden
patent: 6018191 (2000-01-01), Murakami et al.
patent: 6040620 (2000-03-01), Sugimoto et al.
patent: 6046072 (2000-04-01), Matsuura et al.
patent: 6107675 (2000-08-01), Sugimoto et al.
patent: 4-75355 (1992-03-01), None
patent: 4-320052 (1992-11-01), None
patent: 5-335474 (1993-12-01), None
Hagiya Shigeo
Sugimoto Hiroshi
Taketani Noriaki
Yonemoto Takaharu
Yoshioka Osamu
Hitachi Cable Ltd.
McDermott & Will & Emery
Williams Alexander O.
LandOfFree
Lead frame for lead on chip does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Lead frame for lead on chip, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Lead frame for lead on chip will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2494489