Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame
Reissue Patent
1995-05-24
2002-05-07
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
C257S669000, C257S676000
Reissue Patent
active
RE037690
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a lead frame and a semiconductor device. More specifically, the invention relates to a lead frame and a semiconductor device adapted to
preventing
prevent
package cracking
the heat
as a result of
the heat
generated at the time of reflow soldering.
2. Description of the Prior Art
Plastic molded semiconductor devices of the surface mounted type which permits the leads to be directly soldered onto the substrate are becoming established as a standard substitute for conventional devices of the pin inserted type. If packages of such a type are preserved in a high-temperature and high-humidity environment, the plastic will in time absorb moisture which will then be vaporized in an interface between a chip pad (a portion where the chip is mounted which hereinafter is referred to as chip pad) and the plastic portion at the time of heating for soldering (reflow), giving rise to the formation of cracks in the lower corner surface of the chip pad. The cracks develop at the time of reflowing the solder and are usually called reflow cracks.
According to a conventional technique for preventing the reflow cracks from occurring, the back surface of the package is
perforated
for allowing any vapor generated to escape as is disclosed in Japanese Patent Laid-Open No. 208847/1985.
In order to increase the adhering strength on the interface between the plastic portion and the chip pad while preventing the formation of a gap, furthermore, a method has been proposed according to which the surface of the chip pad opposite to the surface on which the chip is mounted is made rugged as disclosed in Japanese Patent Laid-Open Nos. 199548/1983 and 186044/1965. A technique for perforating a portion that corresponds to the chip pad has also been disclosed in Japanese Patent Laid-Open No. 16357/1984 and in U.S. Pat. No. 4,633,583.
Among the above-mentioned conventional techniques, the method of perforating the lower surface of the package helps prevent the formation of reflow cracks but forms a passage that allows the moisture to flow between the exterior and interior of the package which then results in the corrosion of chip electrodes.
The method which forms a rugged surface on the surface of the chip pad opposite to the chip-mounting surface is effective for preventing the displacement between the chip pad and the adhering surface of the plastic portion, but is not effective for preventing the displacement in a direction in which they will be separated away from each other since the plastic portion easily escapes from the recessed portion.
The moisture contained in the plastic vaporizes at the time of reflow soldering of the plastic molded semiconductor device, and the vapor pressure acts on the voids in the interface between the chip pad and the plastic or acts on the cavities in the non-adhered portions to promote the
peelng
peeling
on the interface between the chip pad and the plastic. Even if the cavity becomes progressively larger as a result of peeling, the ambient water content is supplied thereto by diffusion. Therefore, the pressure in the cavity does not decrease, and the plastic portion undergoes deformation giving rise to the formation of cracks starting from a portion where a maximum stress generates at the end of the chip pad (see crack
10
in FIG.
6
). According to the above-mentioned Japanese Patent Laid-Open No. 16357/1984, part of the chip pad is removed and plastic is filled in this portion to prevent the peeling by the thermal stress. Moreover, since the thickness of the plastic portion increases equivalently, resistance against the humidity can be improved to some extent. However, stress in the portion where a maximum stress develops is little different from the case of when a portion of the chip pad is not removed because of the deformation that develops when the plastic portion is peeled off from the chip pad being caused by the vapor pressure at the time of reflow soldering. Therefore, this structure is not very effective for coping with the cracks that develop in the plastic portion at the time of reflow soldering.
In order to prevent the chip from breaking at the time of die bonding or in the subsequent temperature aging, it had
nitherto
hitherto
been attempted to use a lead frame material having a small coefficient of expansion or to use a die bonding agent having a small coefficient of elasticity. However, the traditional methods limited the range for selecting the materials, pushed up the manufacturing cost, and were not completely effective for suppressing the reflow cracks.
The dimple processing is effective for preventing the development of cracks in the plastic portion at the lower end of the chip pad under the temperature cycle testing. However, when there exists a large difference in the linear thermal expansion coefficient between the lead frame material and the plastic material, the cracks easily develop at the root of the resinous protrusion filled in the dimples.
According to the
performation
perforation
method which forms apertures that reach from the surface of the package to the side of the chip pad opposite to the chip mounting
side
surface
in order to suppress the reflow cracks, the moisture easily reaches the interface where the chip pad and the plastic part are adhered together and further reaches the surface of the chip through apertures. When used for extended periods of time, therefore, the device becomes defective as the aluminum (
A
1
Al
) wiring is corroded. Further, this method is not quite effective for suppressing the development of cracks in the plastic at the lower end of the chip pad caused by the temperature cycle.
SUMMARY OF THE INVENTION
The
An
object of the present invention is to prevent the reflow cracks resulting from vapor pressure.
Another object of the present invention is to provide semiconductor device which permits minimum destruction of the semiconductor chips at the time of die bonding or in the subsequent temperature aging, which prevents cracks from developing in the plastic at the lower end of the chip pad even under the temperature cycling test, and which exhibits increased resistance against the reflow cracks.
The above
object is
objects are
achieved by forming a through hole of a particular shape in the chip pad, and holding a plastic portion on the chip pad utilizing the hole, to thereby decrease the stress that generates in the plastic portion on the lower corner surface of the chip pad where reflow cracks may develop.
To prevent the cracks from developing in the plastic at the time of reflow
,
soldering, it is essential that excessive stress is not generated at an end of the chip pad where maximum stress
is
generated even when the plastic portion is peeled off from the chip pad. This requirement is achieved by a structure which is capable of preventing the
plastic
portion from deforming even when there exists no adhesive force between the plastic portion and the chip pad, i.e., by a structure which does not permit the plastic portion to
escape
be deformed away
from the chip pad irrespective of the vapor pressure.
A first
invention
inventive
aspect of the present application is concerned with a unitary structure including a lead frame consisting of a chip pad for mounting a semiconductor chip and a group of leads
connected to said chip pad along the periphery thereof
, the improvement wherein a through hole is formed in at least one place of the chip pad,
said
the
through hole having a tilted portion (tapered portion) with respect to the chip-mounting surface of the chip pad.
The through hole may assume the form in which the entire hole is tilted relative to the direction of thickness of the chip pad or be in the form in which the hole as a wedge portion in the thickness of the chip pad, or may assume any other form.
A second inventive aspect of the present
application
invention
is concerned with a unitary structure including a lead frame consisting of a chip pad for mounting a se
Hatsuda Toshio
Hattori Toshio
Kawai Sueo
Kitano Makoto
Miura Hideo
Antonelli, Terry, Stout & Krays, LLP
Clark Sheila V.
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