LDMOS device with improved ESD performance

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S355000, C257S401000, C257S328000

Reexamination Certificate

active

11337147

ABSTRACT:
A semiconductor device includes a first doped region disposed on a first well in a semiconductor substrate; a second doped region disposed on a second well adjacent to the first well in the semiconductor substrate, the second doped region having a dopant density higher than that of the second well; and a gate structure overlying parts of the first and second wells for controlling a current flowing between the first and second doped regions. A first spacing distance from an interface between the second doped region and the second well to its closest edge of the gate structure is greater than 200 percent of a second spacing distance from a center point of second doped region to the edge of the gate structure, thereby increasing impedance against an electrostatic discharge (ESD) current flowing between the first and second doped regions during an ESD event.

REFERENCES:
patent: 6664140 (2003-12-01), Lee et al.
patent: 2004/0262680 (2004-12-01), Ehwald et al.
patent: 2006/0071236 (2006-04-01), Jensen et al.

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