Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1995-09-07
1999-09-14
Martin-Wallace, Valencia
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257202, 257390, H01L 2976, H01L 31062
Patent
active
059526980
ABSTRACT:
This invention provides a circuit layout pattern and layout method for matching pairs of metal oxide semiconductor field effect transistors used in matched pairs in precision analog circuits. The layout uses dummy Metal oxide field effect transistors, or MOSFETs, to keep the environment the same around each of the MOSFETs in a matched pair. The MOSFETs in a matched pair are in a single row with each MOSFET in the matched pair having dummy MOSFETs adjacent to it on either side. The dummy MOSFETs can be part of the matched pair, can be used in other parts of the circuit, or may not be used. The use of dummy MOSFETs keeps the environment around each MOSFET in the matched pair the same and this improves the matching characteristics.
REFERENCES:
patent: 5040035 (1991-08-01), Gabara et al.
patent: 5063430 (1991-11-01), Mori
patent: 5275962 (1994-01-01), Hashimoto
patent: 5410161 (1995-04-01), Narita
patent: 5481125 (1996-01-01), Harris
patent: 5493135 (1996-02-01), Yin
"The Design of High-Performance Analog Circuits on Digital CMOS Chips" by S.A. Vittoz in IEEE Journal of Solid State Circuits, vol. SC-20, No. 3, Dec. 1985, pp. 3-11.
"Measurement of MOS Current Mismatch in the Weak Inversion Region" vol. 29, No. 2, Feb. 1994 in J. of Solid State Circuits, pp. 138-142.
Ting Jyh-Kang
Tseng Pin-Nan
Wong Shyh-Chyi
Ackerman Stephen B.
Eckert II George C.
Martin-Wallace Valencia
Prescott Larry J.
Saile George O.
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