Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – By reaction with substrate
Reexamination Certificate
2002-07-11
2004-09-21
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
By reaction with substrate
C438S786000, C257S649000
Reexamination Certificate
active
06794312
ABSTRACT:
RELATED APPLICATIONS
This application claims the benefit of the Jul. 11, 2001 priority date of German application 101 33 537.7, the contents of which are herein incorporated by reference.
FIELD OF INVENTION
The present invention relates to a process for producing a nitrided oxide layer on a silicon semiconductor substrate.
BACKGROUND
Although it can in principle be applied to any desired oxides, the present invention and the problem on which it is based are explained with reference to tunnel oxides in integrated DRAM circuits used in silicon technology.
To produce nitrided tunnel oxide, for example for flash memory components, the defined inclusion of nitrogen close to the silicon/silicon oxide interface is necessary, in order to satisfy the demands imposed with regard to long oxide functionality (frequent tunneling, very numerous write/erase cycles).
Furthermore, as part of the ongoing miniaturization of these integrated circuits, it is necessary to maintain a low thermal budget of this process, in order to keep the outdiffusion of the dopants which have already been introduced by this stage of this processing at a low level.
For a narrow yield distribution at a high level, in particular the uniformity of the oxide thickness and of the inclusion of nitrogen are important.
FIG. 3
shows a diagrammatic illustration of a semiconductor substrate with a nitrided tunnel oxide in order to illustrate the problem on which the present invention is based.
In
FIG. 3
,
1
denotes a silicon semiconductor substrate,
10
denotes a first active region,
20
denotes a second active region,
15
denotes a channel region between them,
30
denotes a nitrided tunnel oxide lying above the channel region
15
and
40
denotes a standard gate stack, which includes, for example, a floating gate and a control gate.
The region A is illustrated separately on an enlarged scale. In this enlarged illustration, G denotes the interface between the silicon semiconductor substrate
1
and the nitrided tunnel oxide
30
. The defined inclusion of nitrogen in the crystal lattice of the silicon dioxide is clearly visible.
FIG. 4
shows an example of a temperature curve for a standard RTP process used to produce a nitrided tunnel oxide.
In the example shown, the nitriding takes place by means of NH
3
, with the result that it is possible to produce tunnel oxides with a particularly high cycle stability of typically 10
6
write/erase cycles. The RTP process requires lamp heating in the individual wafer process, in which the individual silicon wafers are brought to the appropriate process temperature and are successively oxidized, nitrided and reoxidized using fluctuating temperatures and gas flows. The reoxidation process is used in particular to remove hydrogen.
The productivity of such a process is very low, since the processing of a single wafer lasts a few minutes. To achieve viable process results at least within this time, very high process temperatures are required, which leads to a high temperature-time load on the process wafers. Since the processed wafer and the process chamber are not in thermodynamic equilibrium throughout the entire process, the temperature distribution over the wafer can only be monitored and optimized with considerable technical outlay. Further problematical properties of the RTP process are mechanical stresses which it induces and which emanate from a temperature gradient caused by the lamp heating.
In the present example, the oxidation takes place at a temperature of 1100° C. over a time period of 60 seconds. This is followed by cooling to 750° C. and renewed heating to 1040° C., at which temperature an NH
3
anneal is carried out for 20 seconds. After further cooling to 750° C., reoxidation takes place at 1170° C. for a period of 60 seconds. In the process shown in
FIG. 4
, the total process time is approx. 400 seconds. However, as has been stated, each wafer is processed individually, which entails a considerable time outlay for the production of an entire batch of approximately 100 to 150 wafers.
In further known processes, instead of NH
3
NO or N
2
O is used in an RTP process. Nitriding in an atmospheric oxidation furnace using NO or N
2
O and/or nitriding in an LPCVD furnace using NH
3
as nitriding gas are also possible.
U.S. Pat. No. 6,204,125 B1 has disclosed a process for forming a nitrided tunnel oxide, in which an oxide layer is formed on a tunnel region of the substrate, then a nitride layer is formed on the oxide layer in an LPCVD process, and then a reoxidation process is carried out and finally the nitride layer is removed.
U.S. Pat. No. 5,258,333 has disclosed a process for producing a nitrided tunnel oxide, in which a silicon surface lying above a channel region is firstly nitrided, then an oxide layer is formed on the nitrided silicon surface, and next the oxide layer and the nitrided silicon surface are oxidized in order to form a combined dielectric layer. In this process, in particular the nitriding takes place by means of a thermal process in pure ammonia (NH
3
).
SUMMARY
Therefore, it is an object of the present invention to provide an improved process for producing a nitrided oxide layer on a silicon semiconductor substrate which ensures a uniform oxide thickness and inclusion of nitrogen and requires a low thermal budget.
The idea on which the present invention is based consists in the use of NH
3
as nitriding gas in an atmospheric batch furnace which is simultaneously used for oxidation and for reoxidation.
Compared to the known approach, the production process according to the invention has the advantage, inter alia, that it is possible to improve the uniformity of the inclusion of nitrogen compared to conventional processes. Consequently, the subsequent reoxidation likewise leads to an improved uniformity of the overall oxide thickness, since the oxide growth is decisively dependent on the degree of nitriding.
According to a preferred development, the nitriding step takes place in an NH
3
atmosphere at a temperature of approximately 850-950° C.
According to a further preferred development, the oxidation step takes place at a temperature of approximately 800-900° C.
According to a further preferred development, the reoxidation step takes place at a temperature of approximately 900-1000° C.
According to a further preferred development, the first predetermined temperature is lower than the second predetermined temperature, and the second predetermined temperature is lower than the third predetermined temperature, and no cooling is carried out between the temperatures.
Exemplary embodiments of the invention are illustrated in the drawings and explained in more detail in the description which follows. In the drawings:
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Gross et al. “An optimized 850°C Low-Pressure-Fernace Reoxidized Nitrided Oxide (ROXNOX) Process.”IEEE Trans. Electron Devices, 1991, vol. 38, No.9. S. 2036-2041.
Lai et al. “Electrical Properties of Nitrided-Oxide Systems for Use in Gate Dielectrics and Eeprom”.In: IEDM International Electron Devices Meeting Technical Digest, NY, USA, IEEE, 1983, S. 190-193.
Widman et al. “Technolgie hochintegrierter Schaltungen” 2.Auflage, Springer, Berlin, 1996, S. 20-29.
Yang et al. “Optimization of Low-Pressure Nitridation/Reoxidation of SiO2for Scaled MOS Devices,”IEEE Trans. Electronic Devices, 1998, vol. 35, No. 7, S. 935-944.
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Abdul-Hak Ayad
Gaertner Thomas
Schulze Joerg
Everhart Caridad
Infineon - Technologies AG
Lee Calvin
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