Electrical computers and digital data processing systems: input/ – Interrupt processing – Source or destination identifier
Reexamination Certificate
2001-02-14
2004-05-04
Lefkowitz, Sumati (Department: 2112)
Electrical computers and digital data processing systems: input/
Interrupt processing
Source or destination identifier
C709S217000, C709S236000
Reexamination Certificate
active
06732212
ABSTRACT:
FIELD OF INVENTION
This invention relates to remote interrupts, and more specifically, to issuing a raw packet over a network in response to a remote interrupt.
BACKGROUND OF THE INVENTION
An interrupt is a signal that notifies a host device or program that a particular event has occurred. When the host receives the interrupt signal, the host can take a specified action or can simply ignore the interrupt signal. Certain interrupt signals can be assigned a higher priority than other interrupt signals or processes. As such, a high priority interrupt signal can cause a lower priority process to temporarily suspend while the higher priority interrupt is processed. In short, interrupt signals can be generated by a hardware or software thereby indicating that some event has occurred. For an interrupt signal to serve its intended purpose, however, it must be received by a device that is capable of interpreting the interrupt and taking the corresponding action.
In a conventional computer system, interrupts generated by Input/Output devices (IO devices) or computer applications are generally handled by an interrupt controller and central processing unit (CPU) that are local to the interrupting device. The local host CPU responds to interrupt requests from each device type that is coupled to the local host bus. IO devices can be coupled to the interrupt controller by direct lines or by shared lines. The interrupt controller receives the interrupt requests and provides them to the CPU along with an interrupt number associated with the interrupt request. Thus, the processing of interrupt requests requires an intelligent host device that is local to the interrupting device, such as a host CPU.
This requirement for an intelligent device can be problematic. For example, consider a network environment having a remote node that only includes a number of unintelligent IO devices coupled to the network via a network interface card (NIC). Each IO device has a unique set of requirements for notifying the host CPU node of an interrupt request. As such, dedicated registers included in the remote NIC are used to store various parameters about each supported IO device. In this way, the remote NIC can be used to handle the remote interrupts.
However, each operation that an IO device performs can have a different set of interrupt parameters or requirements. Moreover, each IO device can have various is interrupt requirements that differ from the interrupt requirements of other IO devices of that node. Thus, the variety of IO devices and operations performed by each of those IO devices can require a significant amount of register space in the remote NIC. One solution to this problem is to simply limit the number of supported operations for each IO device. Such a solution, however, is not always desirable or practical. In addition, if an IO device's interrupt requirements are unknown or unclear, then the remote NIC cannot be configured for that device.
What is needed, therefore, is a technique for handling interrupts generated on a remote and unintelligent node. The technique should be flexible so as to accommodate a number of diverse interrupt requirements and a variety of interrupting devices and events.
BRIEF SUMMARY OF THE INVENTION
One embodiment of the present invention provides a method for processing a remote interrupt signal. The method includes receiving an interrupt signal from an interrupt signal source at a remote node. The method further includes selecting a raw packet based on the received interrupt signal, the raw packet including the identity of the interrupt signal source. The method further includes launching the selected raw packet over the network from the remote node to a host node.
Another embodiment of the present invention provides a system for issuing a raw packet over a network in response to a remote interrupt. The system includes a host node including a processing unit. The host node is operatively coupled to the network, and is for receiving an issued raw packet. This embodiment of the system further includes a remote node including a network interface module and an interrupt signal source. The network interface module is for issuing a raw packet based on an interrupt signal received from the interrupt signal source. The raw packet includes an identity of the interrupt signal source.
Another embodiment of the present invention provides a network interface system. The network interface system includes a raw packet buffer for storing a number of raw packets, each raw packet containing an identity of a corresponding interrupt signal source. In response to an interrupt signal source providing an interrupt signal to the network interface system, the network interface system issues the corresponding raw packet to a host node via a network.
The features and advantages described in the specification are not all inclusive and, in particular, many additional features and advantages will be apparent to one of ordinary skill in the art in view of the drawings, specification, and claims. Moreover, it should be noted that the language used in the specification has been principally selected for readability and instructional purposes, and not to limit the scope of the inventive subject matter.
REFERENCES:
patent: 5490271 (1996-02-01), Elliott et al.
patent: 5842026 (1998-11-01), Wong-Chan et al.
patent: 6170025 (2001-01-01), Drottar et al.
patent: 6205508 (2001-03-01), Bailey et al.
patent: 6233636 (2001-05-01), Kelley et al.
patent: 6247091 (2001-06-01), Lovett
patent: 6658521 (2003-12-01), Biran et al.
patent: 6684281 (2004-01-01), Sugahara et al.
Intel Corporation, “Getting Started with the 21554 Embedded PCI-to-PCI Bridge,” Application Note, 14 pages, Sep. 1998.
Intel Corporation, “Getting Started with the 21554 Embedded PCI-to-PCI Bridge,” Application Note, 14 pages, Order No. 278210-001, Sep. 1998.
Horie Takeshi
Larson Jeffrey D.
Miyoshi Takashi
Sugahara Hirohide
Fenwick & West LLP
Fujitsu Limited
Lefkowitz Sumati
LandOfFree
Launch raw packet on remote interrupt does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Launch raw packet on remote interrupt, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Launch raw packet on remote interrupt will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3270747