Launch-on-shift support for on-chip-clocking

Details Launch-on-shift support for on-chip-clocking Launch-on-shift support for on-chip-clocking

2011-02-01

2011-02-01

Gaffin, Jeffrey A (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S729000

Reexamination Certificate

active

07882410

ABSTRACT:
A method to perform launch-on-shift scanning for integrated circuits having multiple clock domains is presented. An integrated circuit includes both capture clock domains and non-capture clock domains. The portions of the test vectors for non-capture clock domains are shifted into the scan chains of the non-capture clock domains and allowed to settle prior to the last shift launch cycle and the capture cycle of the capture clock domains. Thus, the ambiguity of the timing between the non-capture domains and the capture domains caused by asynchronous clock signals is eliminated.

REFERENCES:
patent: 2004/0163021 (2004-08-01), Nadeau-Dostie
patent: 2006/0136795 (2006-06-01), Gunda et al.
patent: 2006/0282735 (2006-12-01), Weinraub et al.
patent: 2008/0091996 (2008-04-01), Chung

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