Lateral power semiconductor device for high frequency power...

Details Lateral power semiconductor device for high frequency power... Lateral power semiconductor device for high frequency power...

2007-06-28

2010-11-30

Cao, Phat X (Department: 2814)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S155000, C257SE29261, C257SE29106, C257S229000, C257S231000, C257S350000

Reexamination Certificate

active

07842568

ABSTRACT:
A lateral power semiconductor device has a substrate and an isolation layer formed over the substrate for reducing minority carrier storage in the substrate. A well region is formed over the isolation layer. A source region, drain region, and channel region are formed in the well. A first region is formed on a surface of the lateral power semiconductor device adjacent to the source region. The lateral power semiconductor device has a body diode between the first region and drain region. The isolation layer confines the minority carrier charge from the body diode to a depth of less than 20 μm from the surface of the lateral power semiconductor device. In one embodiment, the isolation layer is a buried oxide layer and the substrate is an n-type or p-type handle wafer. Alternatively, the isolation layer is an epitaxial layer and the substrate is made with N+ or P+ semiconductor material.

REFERENCES:
patent: 5420451 (1995-05-01), Williams et al.
patent: 5574295 (1996-11-01), Kurtz et al.
patent: 5801420 (1998-09-01), Fujishima
patent: 6150200 (2000-11-01), Merchant
patent: 6734524 (2004-05-01), Parthasarathy et al.
patent: 2004/0087065 (2004-05-01), Udrea et al.
patent: 2006/0113592 (2006-06-01), Pendharkar et al.

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