Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-03-15
2010-02-02
Coleman, W. David (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257SE21427, C257SE29012, C257S335000
Reexamination Certificate
active
07655515
ABSTRACT:
A high voltage lateral semiconductor device for integrated circuits with improved breakdown voltage. The semiconductor device comprising a semiconductor body, an extended drain region formed in the semiconductor body, source and drain pockets, a top gate forming a pn junction with the extended drain region, an insulating layer on a surface of the semiconductor body and a gate formed on the insulating layer. In addition, a higher-doped pocket of semiconductor material is formed within the top gate region that has a higher integrated doping than the rest of the top gate region. This higher-doped pocket of semiconductor material does not totally deplete during device operation. Moreover, the gate controls, by field-effect, a flow of current through a channel formed laterally between the source pocket and a nearest point of the extended drain region.
REFERENCES:
patent: 4712124 (1987-12-01), Stupp
patent: 4823173 (1989-04-01), Beasom
patent: 4902901 (1990-02-01), Pernyeszi
patent: 5138177 (1992-08-01), Morgan et al.
patent: 5313082 (1994-05-01), Eklund
patent: 5705842 (1998-01-01), Kitamura et al.
patent: 5763927 (1998-06-01), Koishikawa
patent: 2001/0038122 (2001-11-01), Matsuzaki et al.
patent: 0 115 098 (1984-08-01), None
patent: 401238062 (1989-09-01), None
patent: 404107870 (1992-04-01), None
Nezer et al., Optimization of the Breakdown Voltage in LDMOS Transistors Using Internal Field Rings, 1991, IEEE, CH2987, pp. 149-153.
Coleman W. David
Fogg & Powers LLC
Intersil America's Inc.
McCall-Shepard Sonya D
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