KLXX technology with integrated passivation process, probe geome

Details KLXX technology with integrated passivation process, probe geome KLXX technology with integrated passivation process, probe geome

1997-09-30

2000-11-07

Bowers, Charles

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Multiple layers

438781, 438958, H01L 2131

Patent

active

061436682

ABSTRACT:
A method of exposing a bond pad includes: providing an integrated circuit having a bond pad, a first passivation layer overlying an area portion of the bond pad, and a second passivation layer overlying the first passivation layer; removing a portion of the second passivation layer above the area portion of the bond pad exposing an area of the first passivation layer; curing the second passivation; and etching a portion of the exposed area of the first passivation layer to expose the top surface of the bond pad. A method of coupling an integrated circuit chip to a chip package is also disclosed as is a method of probing the bond pads of an integrated circuit. A probe card is further disclosed, including a probe assembly coupled to a printed circuit board, the probe assembly having a sloped sidewall portion with a plurality of probing beams extending from the sidewall portion.

REFERENCES:
patent: 5013689 (1991-05-01), Yamamoto
patent: 5382898 (1995-01-01), Subramanian
patent: 5563102 (1996-10-01), Michael
patent: 5652182 (1997-07-01), Cleeves
patent: 5773987 (1998-06-01), Montoya
patent: 5867032 (1999-02-01), Montoya

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