Isolation trench fabrication process

Details Isolation trench fabrication process Isolation trench fabrication process

1998-04-30

2000-03-07

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438424, 438692, H01L 21336, H01L 2176, H01L 21302, H01L 21461

Patent

active

060339616

ABSTRACT:
Two steps of planarizing are performed during isolation trench fabrication resulting in a more uniform planarization of an integrated circuit substrate. A protective layer deposition and a planarizing step are performed prior to a final planarizing step. Applying protective material fills in a portion of recesses in a dielectric layer overlying isolation trench areas. A first global planarization process eliminates narrower recesses and shallows out deeper recesses without causing dishing in the dielectric material. Much of the protective material is removed by the first global planarization process. The remaining protective material is stripped. A final global planarization process then is performed which removes dielectric material outside of the trench areas. A well-defined border of the trenches results.

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patent: 5940716 (1999-08-01), Jin et al.
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