Isolation regions for semiconductor devices and their formation

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S435000, C438S637000, C438S424000

Reexamination Certificate

active

07344942

ABSTRACT:
A hard mask layer is formed and patterned overlying a semiconductor substrate of a semiconductor device. The patterned hard mask layer exposes two or more areas of the substrate for future isolation regions of the semiconductor device. Portions of the substrate are removed in the areas for future isolation regions, thereby forming two or more trenches. A second mask layer is formed overlying a first portion of the hard mask layer and at least one first trench, and a second portion of the hard mask layer and at least one second trench are left uncovered. Additional substrate material is removed from the at least one second trench so that the at least one second trench is deeper than the at least one first trench. The hard mask layer and the second mask are removed substantially concurrently.

REFERENCES:
patent: 6596608 (2003-07-01), Saito
patent: 6624022 (2003-09-01), Hurley et al.
patent: 6849518 (2005-02-01), Parat et al.
patent: 2004/0092115 (2004-05-01), Hsieh et al.

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