Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Recessed oxide by localized oxidation
Patent
1998-09-04
2000-07-25
Pham, Long
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Recessed oxide by localized oxidation
438426, 438431, 438435, 438444, 438445, 438446, H01L 2176
Patent
active
060936223
ABSTRACT:
An isolation method in the fabrication process of a semiconductor device is provided. The method forms an oxide layer as a buffer layer for reducing stress through chemical vapor deposition (CVD). By the method, a first pad oxide layer and a silicon nitride layer are formed on a semiconductor substrate, and then an silicon nitride layer pattern is formed by patterning, and undercuts are formed in the first pad oxide layer pattern. Subsequently, a second pad oxide layer is formed on the entire surface of the semiconductor substrate through CVD, and then spacers are formed on the sidewalls of both the patterned first pad oxide layer and silicon nitride layer and a field oxide layer is formed through thermal oxidation. Alternatively, a silicon layer is deposited without the spacers to form the field oxide layer. The second pad oxide layer is a buffer layer for buffering stress during formation of the field oxide layer.
REFERENCES:
patent: Re35294 (1996-07-01), Vasquez
patent: 5326715 (1994-07-01), Jang et al.
patent: 5393692 (1995-02-01), Wu
patent: 5395790 (1995-03-01), Lur
patent: 5457067 (1995-10-01), Han
patent: 5504034 (1996-04-01), Rapisarda
patent: 5658822 (1997-08-01), Wu et al.
patent: 5824594 (1998-10-01), Kim et al.
patent: 5834360 (1998-11-01), Tesauro et al.
patent: 5849626 (1998-12-01), Song
patent: 5863827 (1999-01-01), Joyner
patent: 5895253 (1999-04-01), Akram
patent: 5910018 (1999-06-01), Jang
patent: 5913133 (1999-06-01), Lee
D.H. Ahn et al., "A Highly Practical Modified Locos Isolation Technology For The 256 Mbit DRAM", 1994, 28.3.1-28.3.4.
Scott S. Roth et al., "Characterization of Polysiliconencaplsulated Local Oxidation", IEEE Transactions on Electron Devices vol. 39, No. 5 May 1992, pp. 1085-1089.
Ahn Dong-ho
Kim Sung-eui
Shin Yu-gyun
Pham Long
Samsung Electronics Co,. Ltd.
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