Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1996-08-15
1998-10-13
Niebling, John
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438981, H01L 2100, H01L 2184
Patent
active
058211365
ABSTRACT:
A CMOS device architecture which includes substrate-gated inverted PMOS transistors, as well as bulk NMOS. The inverted-PMOS channels are formed in a different layer from the NMOS gates, and these layers may even have different compositions. Moreover, the NMOS and inverted-PMOS devices have different gate oxide layers, so the thicknesses can be independently optimized. The drain underlap of the inverted device is defined by a patterning step, so it can be increased for high-voltage operation if desired.
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Blanchard Richard A.
Chan Tsiu Chiu
Guritz Elmer H.
Han Yu-Pin
Bachand Richard A.
Galanthay Theodore E.
Jorgenson Lisa K.
Lebentritt Michael S.
Niebling John
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