Electrical computers and digital data processing systems: input/ – Interrupt processing – Processor status
Reexamination Certificate
2007-08-28
2007-08-28
Myers, Paul R. (Department: 2112)
Electrical computers and digital data processing systems: input/
Interrupt processing
Processor status
C710S263000, C710S268000, C710S243000, C710S260000, C709S250000, C370S412000
Reexamination Certificate
active
10815902
ABSTRACT:
Provided are techniques for interrupt processing. An Input/Output device determines that an event has occurred. The Input/Output device determines a state of an event data structure. The Input/Output device writes an event entry into the event data structure in response to determining that the event has occurred. After writing the event entry, the Input/Output device determines whether to generate an interrupt or not based on the state of the event data structure.Additionally provided are techniques for interrupt processing in which an I/O device driver determines that an interrupt has occurred. The I/O device driver reads an event entry in an event data structure in response to determining that the interrupt has occurred. The I/O device driver updates a state of a structure state indicator to enable/disable interrupts.
REFERENCES:
patent: 5214759 (1993-05-01), Yamaoka et al.
patent: 5471618 (1995-11-01), Isfeld
patent: 5557744 (1996-09-01), Kobayakawa et al.
patent: 5564005 (1996-10-01), Weber et al.
patent: 5566337 (1996-10-01), Szymanski et al.
patent: 6760783 (2004-07-01), Berry
patent: 6792483 (2004-09-01), Schmidt
patent: 6804631 (2004-10-01), Kelley et al.
patent: 7010633 (2006-03-01), Arndt et al.
patent: 2001/0037397 (2001-11-01), Boucher et al.
patent: 2002/0152327 (2002-10-01), Kagan et al.
patent: 2003/0065856 (2003-04-01), Kagan et al.
patent: 2004/0017819 (2004-01-01), Kagan et al.
patent: 2004/0027374 (2004-02-01), Cirne et al.
patent: 2004/0103225 (2004-05-01), McAlpine et al.
patent: 2004/0237093 (2004-11-01), Stuiman et al.
patent: 2005/0228922 (2005-10-01), Tsao et al.
patent: 2006/0004983 (2006-01-01), Tsao et al.
patent: 2006/0133396 (2006-06-01), Shah et al.
patent: 2006/0149919 (2006-07-01), Arizpe et al.
Buonadonna, P., and D.Culler, “Queue Pair IP: A Hybrid Architecture for System Area Networks”, Proceedings of the 29th Annual International Symposium on Computer Architecture, 2002, pp. 247-256.
Rangarajan, M., A. Bohra, K. Banerjee, E.V. Carrera, and R. Bianchini, “TCP Servers: Offloading TCP Processing in Internet Servers. Design, Implementation, and Performance”, Technical Report, Rutgers University, 2002, pp. 1-14.
Stevens, R. W., “UNIX Network Programming”, 1990, pp. 209-210.
“Virtual Interface Architecture Specification”, Draft Revision 1.0, Dec. 4, 1997, 83 pp.
U.S. Appl. No. 11/106,824, filed Apr. 15, 2005.
IEEE Standard for Information Technology 802.3, Part 3: Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications; Institute of Electrical and Electronics Engineers, Inc., Mar. 8, 2002; 33 pp.
IEEE Std. 802.11b-1999, “Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications . . . ,” Institute of Electrical and Electronics Engineers, Inc., Sep. 16, 1999; 17 pp.
PCI Local Bus Specification Rev. 2.3: PCI Engineering Change Notice—MSI-X, Jun. 10, 2003; Summary pp. 1-2; Chapter 6, “Configuration Space,” pp. 189-209.
PCI Specifications, PCI-SIG 2004; web pages including Mar. 20, 2002 news release “PCI-SIG Releases New PCI Version 2.3 Local Bus Specification for Migration to Low-Voltage Designs,” 18 pp. Available from the Internet at <URL: http://www.pcisig.com>.
Weber, et al., “Fibre Channel (FC) Frame Encapsulation,” Network Working Group, RF C:3643, Dec. 2003; 17 pp.
Culley, et al. “Marker PDU Aligned Framing for TCP Specification (Version 1.0),” Release Specification of the RDMA Consortium; Oct. 25, 2002; 32 pp.
Hilland, et al. “RDMA Protocol Verbs Specification (Version 1.0),” Release Specification of the RDMA Consortium; Apr. 2003; 243 pp.
Recio, et al. “An RDMA Protocol Specification (Version 1.0),” Release Specification of the RDMA Consortium; Oct. 2002; 60 pp.
Shah, et al. “Direct Data Placement over Reliable Transports (Version 1.0),” Release Specification of the RDMA Consortium; Oct. 2002; 35 pp.
Anderson, Don, et al., eds. “PCI System Architecture,” 4thed.; TOC pp. v-xlii; Intro. pp. 1-6; Chapter 1 pp. 7-13; Chapter 2 pp. 15-21; 1999.
Window Platform Design Notes, “Interrupt Architecture Enhancements in Microsoft Windows . . . ,” © 2003 Microsoft Corporation; 42 pp.
Deyring, K. (Ed.), “Serial ATA: High Speed Serialized AT Attachment”, Rev. 1.0, Aug. 29, 2001, 36 pp.
Infiniband, “InfiniBand Architecture Specification vol. 1”, Release 1.0, Oct. 24, 2000, Ch. 1-8, pp. 1-195.
Infiniband, “InfiniBand Architecture Specification vol. 1”, Release 1.0, Oct. 24, 2000, Ch. 9-10, pp. 196-445.
Infiniband, “InfiniBand Architecture Specification vol. 1”, Release 1.0, Oct. 24, 2000, Ch. 11-14, pp. 446-669.
Infiniband, “InfiniBand Architecture Specification vol. 1”, Release 1.0, Oct. 24, 2000, Ch. 15-20, pp. 670-880.
Infiniband, “InfiniBand Architecture Specification vol. 2”, Release 1.0, Oct. 24, 2000, Ch. 1-11, pp. 1-319.
Infiniband, “InfiniBand Architecture Specification vol. 2”, Release 1.0, Oct. 24, 2000, Ch. 12-Appendix D, pp. 320-623.
EP Office Action, Feb. 9, 2006, for International Application No. 03 812 441.8-22111.
PCT International Search Report, Aug. 9, 2004, for International Application No. PCT/US03/37254.
Penokie, G.O. (Ed.), “Information Technology-SCSI Controller Commands-2 (SCC-2)”, T10/Project 1225D, Revision 4, Sep. 12, 1997, 24 pp.
RDMA Consortium, “Architectural Specifications for RDMA over TCP/IP”, [online], 2005, [retrieved on Dec. 22, 2005], retrieved from the Internet at <URL: http://www.rdmaconsortium.org/home>.
Salzmann, T., and M. Peppel, “GTO Driving Protection Technique with Status Monitoring”, IEEE Transactions on Industry Applications, vol. 24, Issue 1, Part 1, 1998, pp. 115-120. [Abstract].
U.S. First Office Action, Mar. 10, 2006, for U.S Appl. No. 10/816,435.
Wangdee, W. and R. Billinton, “Utilization of Time Varying Event-based Customer Interruption Cost Load Shedding Schemes”, 2004 International Conference on Probabilistic Methods Applied to Power Systems, Sep. 2004, pp. 769-775. [Abstract].
Oztaskin Ali S.
Shah Hemal V.
Tsao Gary Y.
Davda Janaki K.
Intel Corporation
Konrad Raynes & Victor LLP
Misiura Brian
Myers Paul R.
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