Interpolating circuit

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor

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Details

326121, 326 83, 326 17, H03K 19094, H03K 190175, H03K 1901

Patent

active

060160640

ABSTRACT:
There is a parallel-connected circuit of a first PMOS transistor P1 having its gate connected to a first input terminal IN1 and a second PMOS transistor P2 having its gate connected to a second input terminal IN2, and a first series-connected circuit of a first NMOS transistor N1 having its gate connected to the first input terminal IN1 and a second NMOS transistor N2 having its gate connected to the second input terminal IN2, and there is a second series-connected circuit of a third PMOS transistor P3 having its gate connected to the first input terminal IN1 and a fourth PMOS transistor P4 having its gate connected to the second input terminal IN2, which is provided between the first power supply and output terminal, this being connected in parallel with the parallel-connected circuit of the first PMOS transistor P1 and the second PMOS transistor P2.

REFERENCES:
patent: 5629638 (1997-05-01), Kumar

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