Internal voltage boosting method and circuit for a semiconductor

Details Internal voltage boosting method and circuit for a semiconductor Internal voltage boosting method and circuit for a semiconductor

1996-04-23

1998-01-06

Nguyen, Viet Q.

Static information storage and retrieval

Read/write circuit

Including level shift or pull-up circuit

365204, 365191, 36518909, 327538, 327534, 327536, G11C 700

Patent

active

057062307

ABSTRACT:
An internal voltage boosting circuit for a semiconductor memory device comprises first and second boosted voltage generators for boosting an internal voltage of said memory device. A voltage level detector is operative to detect the internal voltage. A first logic circuit is operatively connected to the first generator and to the voltage level detector. The logic circuit activates the first generator when (a) the detected voltage falls below a predetermined voltage and (b) the memory device is in an active state. A second logic circuit is operatively connected to the second generator. The second logic circuit activates the second generator when said memory device is in a precharge state.

REFERENCES:
patent: 5451896 (1995-09-01), Mori
patent: 5592421 (1997-01-01), Kaneko et al.
patent: 5612861 (1997-03-01), Zhong et al.
patent: 5631867 (1997-05-01), Akamatsu et al.
patent: 5633825 (1997-05-01), Sakuta et al.

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