Internal source voltage generator for a semiconductor memory dev

Static information storage and retrieval – Read/write circuit – Including signal clamping

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Details

365226, 365201, G11C 700

Patent

active

059462426

ABSTRACT:
A circuit for generating an internal source voltage signal responsive to an external source voltage signal in a semiconductor memory device prevents malfunction and extends the lifetime of the device by clamping the internal source signal if the device is in a normal operating mode when the external source signal is in a stress operating range. When the device is placed in a test mode, the circuit allows the internal source signal to increase in proportion to the level of the external source signal when the external source signal is in a stress operating range. The circuit includes in internal source voltage generator, which always clamps the internal source signal when the external source signal is in a normal operating range, and a pull-up unit which is activated in response to a control signal. The control signal is enabled when the device is placed in a test mode by combining external timing signals.

REFERENCES:
patent: 5063304 (1991-11-01), Iyengar
patent: 5262999 (1993-11-01), Etoh et al.
patent: 5283762 (1994-02-01), Fujishima
patent: 5452253 (1995-09-01), Choi
patent: 5659503 (1997-08-01), Sudo et al.

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