Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2005-05-31
2005-05-31
Dildine, R. Stephen (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C714S723000, C714S736000, C714S738000
Reexamination Certificate
active
06901542
ABSTRACT:
A method of testing a semiconductor device having a memory is disclosed. The method includes selecting a portion of the memory; testing the selected portion of the memory; designating the selected portion of the memory as a designated memory in response to an acceptable testing result; and storing data in the designated portion of the memory for retrieval at a later time. Provision for soft repair of the selected memory is made. Test data can be compressed before being stored in the designated memory.
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Bartenstein Thomas W.
Farnsworth, III L. Owen
Heaberlin Douglas C.
Horton, III Edward E.
Huisman Leendert M.
Dildine R. Stephen
Schmeiser Olsen & Watts
Walsh Robert A.
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