Interleaving method and system

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

Reexamination Certificate

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Reexamination Certificate

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07610457

ABSTRACT:
An interleaving method employing symbol interleaving, tone interleaving, and cyclic interleaving for transmitting data includes storing data at write address values in a memory which are sequentially calculated according to a predetermined process, and reading data stored at read address values of the memory which are sequentially calculated according to a predetermined process, wherein the memory has N data banks, each data bank has M storage spaces, and there are D interleaving target data having data numbers A, and the storing data operation includes storing the data at storage spaces of the data banks, the storage spaces corresponding to integer values and the data banks corresponding to remainders obtained by dividing the data numbers A by results of dividing a total number of data D by the number of storage spaces M.

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patent: 2005/0050428 (2005-03-01), Urard et al.
patent: WO 2005/055544 (2005-06-01), None
Nur Engin: “A turbo decoder architechture with scalable parallelism”, Proc. Workshop on Signal Processing Systems SIPS 2004, Oct. 13, 2004, pp. 298-303, ISBN: 0/7803-8504-7.

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