Interfacing direct memory access devices to a non-ISA bus

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395842, G06F 1300

Patent

active

060885173

ABSTRACT:
A computer system having separate, yet compatible DMA controllers on a bus. Each DMA controller for controlling at least one DMA channel, each DMA controller having an independent set of registers for performing DMA operations and a configuration register for indicating channel status and designation. A DMA master for compatibly communicating with a processor and for initializing and communicating with the multiple DMA controllers.

REFERENCES:
patent: 5317715 (1994-05-01), Johnson et al.
IBM Technical Disclosure Bulletin, vol. 31, No. 10, Mar. 1989, New York US, pp. 126-129, XP000081468 "emulation of ibm pc bus operations by an 80188 processor".
Intel.RTM. 8237 High Performance Programmable DMA Controller (8237A, 8237A-4, 8237A-5); Oct. 1987 (pp. 2-22-2-258).
PCI, Revision 2.1, A100910-940 (pp. 35-55); Jun. 1, 1995.

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