Interface circuit and input buffer integrated circuit...

Details Interface circuit and input buffer integrated circuit... Interface circuit and input buffer integrated circuit...

1999-09-14

2001-09-04

Tokar, Michael (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Signal level or switching threshold stabilization

C326S030000, C326S083000

Reexamination Certificate

active

06285209

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to an interface circuit and an input buffer integrated circuit including the same. More particularly, the invention relates to an interface circuit which is provided in a peripheral device or so forth inputting an output signal of a personal computer (hereinafter referred to as PC) or the like for controlling an input signal level of an input buffer inputting the output signal of the PC or the like, and an input buffer integrated circuit including the same.
2. Description of the Related Art
FIG. 10
is an illustration showing a construction of the conventional interface performing exchange of data between a PC and a peripheral device. The interface shown in
FIG. 10
is constructed with an output buffer
2
on the side of the PC, an input buffer
5
on the side of the peripheral device and a cable
3
connecting both buffers. The output buffer
2
is provided in a buffer integrated circuit
1
integrated into a single chip. On the other hand, the input buffer
5
is provided within a buffer integrated circuit
6
integrated into a single chip.
In such interface, if impedances of an output stage of the output buffer
2
and an input stage of the input buffer are unmatching with each other, reflection is caused in the signal at the input stage of the input buffer
5
. Due to reflection, ringing, such as simulation waveform shown in
FIG. 11
is caused in the signal of the input stage of the input buffer
5
. In
FIG. 11
, PCOUT corresponds to an output waveform of the output buffer
2
on the side of PC shown in
FIG. 10
, and PERIN corresponds to an input waveform of the input buffer
5
on the side of the peripheral device, respectively. It should be noted that
FIG. 11
shows an operation upon falling down of the signal.
On the other hand, an advanced technology (AT) interface to be frequently used in the interface between the PC and the peripheral device, exchange of data is performed according to transistor transistor logic (TTL) standard. Therefore, if ringing exceeds 0.8V of the waveform in a period (a) in
FIG. 11
, ringing can be erroneously recognized as “H” level signal to result in malfunction in the input buffer
5
on the side of the peripheral device.
Essentially, ringing due to reflection can be reduced by matching of impedances. However, for the peripheral device, for which connection with unspecified PC, impedance matching is difficult to establish for variation of condition for difference of specification and material of output driver, connection cable, connecting connector and so forth.
Therefore, seeking for impedance matching cannot be effective measure for ringing.
SUMMARY OF THE INVENTION
The present invention has been worked out in order to solve the problems in the prior art set forth above. Therefore, it is an object of the present invention to provide an interface circuit which can effectively prevent ringing of a signal waveform, and an input buffer integrated circuit including the same.
According to the first aspect of the present invention, an interface circuit provided in a second device inputting an output signal of a first device, controlling an input signal level to an input buffer inputting the output signal, comprises control means for controlling the input signal level depending upon a result of comparison of a level of the output signal and a predetermined reference level.
In the preferred construction, the control means includes a comparator circuit comparing the output signal level and the reference level and a switching element turning ON and OFF depending upon the result of comparison of the comparator circuit for controlling the input signal level.
According to the second aspect of the present invention, an input buffer integrated circuit comprises:
an input buffer provided in a second device inputting an output signal of a first device and inputting the output signal;
an interface circuit provided in the second device, integrated with the input buffer on a single chip for forming an integrated circuit, and including control means for controlling a level of the input signal depending upon a result of comparison of a level of the output signal and a predetermined reference level.
In the preferred construction, the control means includes a comparator circuit comparing the output signal level and the reference level and a switching element turning ON and OFF depending upon the result of comparison of the comparator circuit for controlling the input signal level.
In short, in accordance with the present invention, in an interface between a PC and its peripheral device (magnetic disk drive, floppy disk drive or so forth), an active clamping circuit is provided on an input portion of the input buffer of the peripheral device.
Then, by setting the reference voltage at −0.3V, for example, ringing due to under-shooting of the input waveform can be suppressed. On the other hand, by modification of the circuit construction, it may be possible to clamp the voltage level higher than or equal to a predetermined level to suppress ringing due to over-shooting.


REFERENCES:
patent: 5134311 (1992-07-01), Biber et al.
patent: 5598119 (1997-01-01), Thayer et al.
patent: 5663663 (1997-09-01), Cao et al.
patent: 5949249 (1999-09-01), Preuss et al.
patent: 10-126316 (1998-05-01), None
Japanese Office Action, dated Sep. 12, 2000, with English language translation of Japanese Examiner's comments.

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