Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
Reexamination Certificate
2011-07-26
2011-07-26
Crawford, Jason M (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Signal level or switching threshold stabilization
C326S027000, C326S086000, C327S109000, C327S198000, C365S189050, C365S230080
Reexamination Certificate
active
07986162
ABSTRACT:
An interface of the present invention includes a first inverter circuit that inverts a logic level of an input signal given to an external input terminal and outputs the inverted logic level, a second inverter circuit that outputs a potential in which a logic level of an output signal of the first inverter circuit is inverted, that is, a potential higher or lower than a logic of an input signal applied to the first inverter circuit by the amount of a predetermined potential, and a feedback path that positive feedbacks an output signal of the second inverter circuit to the external input terminal. The interface circuit of the invention positive-feedbacks a potential of the output signal of the second inverter circuit and shifts the potential of the external input terminal in a floating state to an H or L level potential.
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Japanese Office Action dated Oct. 27, 2006 and English translation thereof issued in a counterpart Japanese Application No. 2003-188027.
Amster Rothstein & Ebenstein LLP
Crawford Jason M
Yamatake Corporation
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