Interconnection structures for integrated circuits including rec

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365 51, G11C 1100

Patent

active

060117125

ABSTRACT:
Interconnection structures for integrated circuits include first and second spaced apart active regions in an integrated circuit at a face thereof and a recessed isolation region in the integrated circuit, between the first and second spaced apart active regions and recessed beneath the face. A first conductive layer is included on the recessed isolation region. The first conductive layer extends between the first and second spaced apart active regions beneath the face, and electrically connects the first and second spaced apart active regions beneath the face. Accordingly, high density isolation regions and interconnection regions for the first and second spaced apart active regions are provided. A second conductive layer is preferably included on the face, extending from on the first active region onto the first conductive layer and onto the second active region. The interconnect structures may be formed by forming an isolation region in a face of an integrated circuit substrate, and first and second spaced apart active regions in the integrated circuit substrate at the face. A portion of the isolation region is removed, to form a recessed isolation region. A first conductive layer is formed on the recessed isolation region such that the first and second spaced apart regions and the first conductive layer are electrically interconnected beneath the face. A second conductive layer is formed on the face, extending from on the first active region onto the first conductive layer and onto the second region.

REFERENCES:
patent: 4649625 (1987-03-01), Lu
patent: 4984196 (1991-01-01), Tran et al.
patent: 5064777 (1991-11-01), Dhong et al.

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