Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-06-01
2009-12-01
Ghyka, Alexander G (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S629000, C438S597000, C257SE21585
Reexamination Certificate
active
07625819
ABSTRACT:
An interconnection process is provided. The process includes the following steps. Firstly, a semiconductor base having at least a electrical conductive region is provided. Next, a dielectric layer with a contact hole is formed to cover the semiconductor base, wherein the contact hole exposes part of the electrical conductive region. Then, a thermal process is performed on the semiconductor base covered with the dielectric layer. Lastly, a conductive layer is formed on the dielectric layer, wherein the conductive layer is electrically connected to the electrical conductive region through the contact hole.
REFERENCES:
patent: 6169019 (2001-01-01), Takagi
patent: 2004/0207045 (2004-10-01), Imoto
patent: 2004/0256351 (2004-12-01), Chung et al.
patent: 2005/0020093 (2005-01-01), Ahn et al.
patent: 2005/0221612 (2005-10-01), Brown et al.
Chen Kuang-Chao
Luoh Tuung
Su Chin-Ta
Yang Ling-Wu
Yang Ta-Hung
Bacon & Thomas PLLC
Ghyka Alexander G
Macronix International Co. Ltd.
Nikmanesh Seahvosh J
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