Electronic digital logic circuitry – Significant integrated structure – layout – or layout... – Field-effect transistor
Reexamination Certificate
2011-07-19
2011-07-19
Cho, James (Department: 2819)
Electronic digital logic circuitry
Significant integrated structure, layout, or layout...
Field-effect transistor
C326S101000, C365S072000
Reexamination Certificate
active
07982504
ABSTRACT:
An interconnection architecture for multilayer circuits includes an array of vias and a CMOS layer configured to selectively access the array of vias according to an address. The interconnection architecture also includes a crossbar stack which includes layers of intersecting wire segments with programmable crosspoint devices interposed between intersecting wire segments. The vias are connected to the wire segments such that each programmable crosspoint device is uniquely addressed and every address within a contiguous address space accesses a programmable crosspoint device.
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Cho James
Hewlett -Packard Development Company, L.P.
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