Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-09-12
2006-09-12
Nhu, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S700000
Reexamination Certificate
active
07105445
ABSTRACT:
A method of making an interconnect which includes providing an interconnect structure in a dielectric material, recessing the dielectric material such that a portion of the interconnect structure extends above an upper surface of the dielectric and depositing an encasing cap over the extended portion of the interconnect structure.
REFERENCES:
patent: 5581110 (1996-12-01), Razouk et al.
patent: 5686760 (1997-11-01), Miyakawa
patent: 5889328 (1999-03-01), Joshi et al.
patent: 6103625 (2000-08-01), Marcyk et al.
patent: 6157081 (2000-12-01), Nariman et al.
patent: 6215129 (2001-04-01), Harvey et al.
patent: 6294799 (2001-09-01), Yamazaki et al.
patent: 6391669 (2002-05-01), Fasano et al.
patent: 6492263 (2002-12-01), Peng et al.
patent: 6689683 (2004-02-01), Yamamoto
patent: 2003/0111729 (2003-06-01), Leu et al.
Clevenger Lawrence A.
Dalton Timothy J.
Hsu Louis C.
Radens Carl J.
Standaert Theodorus E.
Connolly Bove & Lodge & Hutz LLP
Nhu David
Trepp, Esq. Robert
LandOfFree
Interconnect structures with encasing cap and methods of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Interconnect structures with encasing cap and methods of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Interconnect structures with encasing cap and methods of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3576017