Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-10-16
2007-10-16
Crane, Sara (Department: 2811)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S613000
Reexamination Certificate
active
11032975
ABSTRACT:
Microelectronic workpieces that have bump sites over bond-pads and methods of fabricating such bump sites. One embodiment of such a workpiece, for example, includes a substrate having a plurality of microelectronic dies comprising integrated circuitry and bond-pads, such as copper bond-pads, electrically coupled to the integrated circuitry. The workpiece further includes (a) a dielectric structure having a plurality of openings with sidewalls projecting from corresponding bond-pads, and (b) a plurality of caps over corresponding bond-pads. The individual caps can include a discrete portion of a barrier layer attached to the bond-pads and the sidewalls of the openings, and a discrete portion of a cap layer on the barrier layer. The caps are electrically isolated from each other and self-aligned with corresponding bond-pads without forming a mask layer over the cap layer.
REFERENCES:
patent: 5736456 (1998-04-01), Akram
patent: 5773359 (1998-06-01), Mitchell et al.
patent: 6107180 (2000-08-01), Munroe et al.
patent: 6130141 (2000-10-01), Degani et al.
patent: 6268114 (2001-07-01), Wen et al.
patent: 6294471 (2001-09-01), Tseng
patent: 6429511 (2002-08-01), Ruby et al.
patent: 6441487 (2002-08-01), Elenius et al.
patent: 6451681 (2002-09-01), Greer
patent: 6452270 (2002-09-01), Huang
patent: 6455408 (2002-09-01), Hwang et al.
patent: 6534396 (2003-03-01), Fahn et al.
patent: 6534863 (2003-03-01), Walker et al.
patent: 6770958 (2004-08-01), Wang et al.
patent: 2001/0008311 (2001-07-01), Harada et al.
patent: 2002/0047218 (2002-04-01), Liu et al.
patent: 2002/0086533 (2002-07-01), Jang et al.
patent: 2004/0157450 (2004-08-01), Bojkov et al.
patent: 0 949 672 (1999-10-01), None
International Search Report and Written Opinion for International Application No. PCT/US2006/000881, 10 pages, mailed May 22, 2006.
Cook Keith R.
Tang Sanh D.
Tuttle Mark E.
Arora Ajay
Crane Sara
Micro)n Technology, Inc.
Perkins Coie LLP
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