Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-10-26
2009-10-20
Nhu, David (Department: 2895)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S627000, C438S629000, C438S643000, C257SE21320, C257SE21347, C257SE21475, C257SE21685
Reexamination Certificate
active
07605072
ABSTRACT:
An interconnect structure that includes a barrier-redundancy feature which is capable of avoiding a sudden open circuit after an electromigration (EM) failure as well as a method of forming the same are provided. In accordance with the present invention, the barrier-redundancy feature is located within preselected locations within the interconnect structure including in a wide line region, a thin line region or any combination thereof. The barrier-redundancy feature includes an electrical conductive material located between, and in contact with, a conductive line diffusion barrier of a conductive line and a via diffusion barrier of an overlying via. The presence of the inventive barrier-redundancy feature creates an electrical path between the via diffusion barrier along the sidewalls of the via and the conductive line diffusion barrier along the sidewalls of the conductive line. This electrical path generated by the inventive barrier-redundancy feature can avoid a sudden open circuit resulting from EM failure at the bottom of the via. The presence of the inventive barrier-redundancy feature within an interconnect structure provides sufficient time for chip replacement or system operation.
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Hsu Louis L.
Yang Chih-Chao
Brown, Esq. Katherine S.
International Business Machines - Corporation
Nhu David
Scully , Scott, Murphy & Presser, P.C.
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