Interconnect structure for semiconductor devices

Details Interconnect structure for semiconductor devices Interconnect structure for semiconductor devices

2010-10-12

2011-11-08

Roman, Angel (Department: 2812)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S584000, C438S585000, C438S623000, C438S626000, C438S627000, C438S634000, C438S637000, C438S641000, C438S653000, C438S687000, C438S762000, C438S767000, C257S754000, C257S774000, C257SE21579, C257SE23011, C257SE23142, C257SE23145, C257SE23175

Reexamination Certificate

active

08053356

ABSTRACT:
A cap layer for a copper interconnect structure formed in a first dielectric layer is provided. In an embodiment, the cap layer may be formed by an in-situ deposition process in which a process gas comprising germanium, arsenic, tungsten, or gallium is introduced, thereby forming a copper-metal cap layer. In another embodiment, a copper-metal silicide cap is provided. In this embodiment, silane is introduced before, during, or after a process gas is introduced, the process gas comprising germanium, arsenic, tungsten, or gallium. Thereafter, an optional etch stop layer may be formed, and a second dielectric layer may be formed over the etch stop layer or the first dielectric layer.

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