Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Multiple layers
Reexamination Certificate
2005-12-20
2008-10-28
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Multiple layers
C438S758000, C438S775000, C438S791000, C257S687000, C257S789000, C257S791000, C257SE23077, C257SE23132
Reexamination Certificate
active
07442653
ABSTRACT:
An exemplary manufacturing method of an inter-metal dielectric of a semiconductor device according to an embodiment of the present invention includes forming a first silicon-rich oxide (SRO) layer on a silicon substrate provided with or otherwise having a copper line layer therein, forming a plasma enhanced fluorosilicate glass (PEFSG) layer on the first SRO layer, plasma-treating the PEFSG layer, and forming a second SRO layer on the plasma-treated PEFSG layer. According to the present invention, the thickness of the second SRO layer of the inter-metal dielectric can be reduced. Consequently, process cost can be reduced, and the total thickness of the inter-metal dielectric can be reduced so as to lower the dielectric constant thereof, reduce the aspect ratio of any via holes that are subsequently formed in the inter-metal dielectric, and potentially increase the yield as a result of the reduced via hole aspect ratio.
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Coleman W. David
Dongbu Electronics Co. Ltd.
Fortney Andrew D.
Kim Su C
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