Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1999-03-03
2001-10-02
Myers, Paul R. (Department: 2181)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S064000
Reexamination Certificate
active
06298408
ABSTRACT:
CLAIM OF PRIORITY
This application makes reference to, incorporates the same herein, and claims all benefits accruing under 35 U.S.C. §119 from an application entitled AN INTELLIGENT INPUT/OUTPUT CONTROLLER FOR INTERFACE FUNCTION SWITCHING earlier filed in the Korean Industrial Property Office on the 3
rd
day of March 1998, and there duly assigned Serial No. 98-6852, a copy of which is annexed hereto.
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to the field of use of computer system architecture. More particularly, the present invention relates to a Peripheral Component Interconnect (PCI) bus and an intelligent input/output controller and associated implementation methods pertaining to computer systems.
2. Related Art
Computer systems are information handling systems that are utilized by many individuals and businesses today. A computer system can be defined as a microcomputer that includes a central processing unit (CPU), a volatile memory, a non-volatile memory such as read only memory (ROM), a display monitor, a keyboard, a mouse or other input device such as a trackball, a floppy diskette drive, a compact disc-read only memory (CD-ROM) drive, a modem, a hard disk storage device, and a printer. A computer system's main board, which is a printed circuit board known as a motherboard, is used to electrically connect these components together. A computer system can be a desktop computer, a portable computer such as a notebook computer or palm-sized computer, or other type of computer.
The central processing unit is often described as a microprocessor. The microprocessor is an electronic component having internal logic circuitry handling most, if not all, the data processing in the computer system. The internal logic circuitry of microprocessors is typically divided into three functional parts known as the input/output (I/O) unit, the control unit, and the arithmetic-logic unit (ALU). These three functional parts interact together and determine the power and performance of the microprocessor. The combination of the control unit and the arithmetic-logic unit can be referred to as the central processing unit. Also, the combination of the input/output unit, the control unit, and the arithmetic-logic unit can be referred to as the central processing unit.
One example of non-volatile memory is read only memory (ROM). Information stored in non-volatile memory can remain unchanged even when there is a power failure. The information stored in non-volatile memory will stay there until it is changed. Read only memory is used to store important information such as instructions for the central processing unit. There are different types of read only memory including electrically-erasable-programmable-read-only-memory (EEPROM) chip and flash-read-only-memory (flash-ROM). The flash-ROM can also be referred to as flash memory.
Computer systems include a basic input output system (BIOS) which is an especially important program stored in read only memory. The basic input output system tests a computer every time the computer is powered on. The basic input output system can allocate a computer system's resources automatically, making adjustments needed to accommodate new hardware. Also, the basic input output system governs how system board components interact.
When the computer system is powered on, the basic input output system immediately takes control of the computer system and its components. The first duty of the basic input output system is to perform a series of diagnostic routines called the power on self test (POST) routine, which ensures that every part of the computer system's hardware is functioning properly.
An “intelligent” controller can be described as a device controller provided with local interpreting functions. For example, the local interpreting functions could include editing, input validity checks, and complex command decoding. “Intelligent” instruments can include devices that are provided with capabilities that cause them to be superior to instruments that merely sense and display analog information. More particularly, a variety of “intelligence” levels can be shown pertaining to “intelligent” instruments. For example, an instrument characterized as having a low intelligence level could be equipped with a first ability to sense and display information in combination with a second ability to convert analog information into digital information. An instrument characterized as having an intermediate intelligence level could be equipped with an ability to mathematically manipulate digital data. An instrument characterized as having a higher intelligence level could be equipped with a first ability to interpret results of mathematical manipulation in combination with a second ability to make decisions based on the interpretation of the results.
Presently, computer systems employ a wide variety of peripheral components or input/output (I/O) devices. An example can be seen where the host processor of the computer system is connected to input/output devices through a component bus defined by the Peripheral Component Interconnect (PCI) Local Bus Specification, Revision 2.0, published by the PCI Special Interest Group. The PCI Special Interest Group can be reached at 2575 NE Kathryn St. #17, Hillsboro, Oreg. 97124. During system initialization, the host processor loads a device driver for each PCI device on the PCI bus. During operation, the PCI bus is occupied each time a read or write transaction is occurring. The part of the host processor's processing time that is used in processing the interrupts generated by each PCI device is taken away from the total processing time of the host processor.
I have found that an input/output controller for a PCI bus could be modified to be improved. Efforts have been made to improve input/output control, buses, and devices coupled to buses.
Exemplars of recent efforts in the art include U.S. Pat. No. 5,857,083 for BUS INTERFACING DEVICE FOR INTERFACING A SECONDARY PERIPHERAL BUS WITH A SYSTEM HAVING HOST CPU AND A PRIMARY PERIPHERAL BUS issued to Venkat, U.S. Pat. No. 5,848,249 for METHOD AND APPARATUS FOR ENABLING INTELLIGENT I/O SUBSYSTEMS USING PCI I/O DEVICES issued to Garbus U.S. Pat. No. 5,838,935 for METHOD AND APPARATUS PROVIDING PROGRAMMABLE DECODE MODES FOR SECONDARY PCI BUS INTERFACES issued to Davis et al., U.S. Pat. No. 5,787,306 for AUTOMATIC ASSIGNMENT OF I/O ADDRESSES IN A COMPUTER SYSTEM issued to Michael, U.S. Pat. No. 5,778,197 for METHOD FOR ALLOCATING SYSTEM RESOURCES IN A HIERARCHICAL BUS STRUCTURE issued to Dunham, U.S. Pat. No. 5,748,921 for COMPUTER SYSTEM INCLUDING A PLURALITY OF MULTIMEDIA DEVICES EACH HAVING A HIGH-SPEED MEMORY DATA CHANNEL FOR ACCESSING SYSTEM MEMORY issued to Lambrecht et al., U.S. Pat. No. 5,655,145 for PERIPHERAL INTERFACE CIRCUIT WHICH SNOOPS COMMANDS TO DETERMINE WHEN TO PERFORM DMA PROTOCOL TRANSLATION issued to Chejlave, Jr. et al. and U.S. Pat. No. 5,592,682 for INTERFACE CIRCUIT FOR TRANSFERRING DATA BETWEEN HOST DEVICE AND MASS STORAGE DEVICE IN RESPONSE TO DESIGNATED ADDRESS IN HOST MEMORY SPACE ASSIGNED AS DATA PORT issued to Chejlava, Jr. et al.
While these recent efforts provide advantages, I note that they fail to adequately provide an efficient and improved intelligent input/output controller for a PCI bus.
SUMMARY OF THE INVENTION
It is an object of the present invention to divide the intelligent I/O controller hardware into the following two modules: a basic module and a special I/O interface module. The basic module can be commonly applied to any I/O controllers. However, the special I/O interface module is for a particular I/O device controller. The aforementioned two modules are connected to one another.
In other words, it is an object of the present invention to divide the hardware of the intelligent input and output controller into a common input and output controller part and a specific input and output controller part, thereby, when implementing an intelligent input and output controller of a new input and output dev
Bushnell , Esq. Robert E.
Myers Paul R.
Samsung Electronics Co,. Ltd.
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