Integration for buried epitaxial stressor

Details Integration for buried epitaxial stressor Integration for buried epitaxial stressor

2011-01-04

2011-01-04

Smith, Bradley K (Department: 2894)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S149000, C438S424000

Reexamination Certificate

active

07863141

ABSTRACT:
Structures and methods of fabricating isolation regions for a semiconductor device. An example method comprises the following. We form one or more buried doped regions in a substrate. We form a stressor layer over the substrate. We form a strained layer over the stressor layer. We form STI trenches down through the strained layer and the stressor layer to as least partially expose the buried doped regions. We etch the buried doped regions to form at least a buried cavity in communication with the STI trenches. In the first and second embodiments, we fill only the STI trenches with insulation material to form isolation regions and form voids in the cavities. In the third and fourth embodiments, we fill both the STI trenches and the cavities with insulation material.

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