Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-05-05
2001-05-29
Dang, Trung (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S683000, C438S656000, C438S655000
Reexamination Certificate
active
06238984
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to the field of the semiconductor device, and more particularly, to high voltage and low voltage devices.
2. Description of the Prior Art
Generally, there exists a trend in the field of ultra large scale integration to integrate different types of electric devices. We will suffer some issues while integrating these devices, and we have to solve these problems.
If we apply the conventional silicide process to the integration process of high voltage and low voltage devices, silicide such as titanium silicide (TiSi
2
) will be produced on the source/drain region of the devices. The titanium silicide does not affect the low voltage device. However, the higher electric resist resulting from titanium silicide will reduce the current of the device, and will spoil the device.
Besides, if we apply the polycide process to integrate the high voltage and low voltage devices, the high voltage device will not be affected, but the feature of low voltage logic device will be spoiled. And more particularly, in such process, we cannot use the prior cell library any more.
Consequently, it is an important issue to integrate high voltage and low voltage devices. It is important that, in the integration process, we keep using the cell library established before, and maintain the function of the high voltage device.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method is provided for integrating the process of high voltage and low voltage devices. The process contains silicide processes of high voltage device, and maintains the function of high voltage device.
It is another object of this invention to integrate the process of high voltage and low voltage devices. The process maintains the high current feature of low voltage device and keeps on using the prior cell library.
In one embodiment, we provide a process of high voltage and low voltage devices. A cap oxide is formed after implanting the source and drain during the process. Then, a photoresist is formed to cover the cap oxide on a high voltage device. With the protection of the photoresist, the cap oxide on the high voltage device will not be removed at the next dry etching step. The photoresist covering the cap oxide on high voltage device is thereafter removed. After removing the photoresist, a metal layer such as a titanium (Ti) layer is formed on high voltage and low voltage devices individually. Silicide region will be formed on the low voltage device but not on the high voltage device because of the isolation by the cap oxide layer. Finally, the unreacted metal is removed and an inter-layer dielectric layer is formed on the high voltage and the low voltage devices.
According to the former statement, we can integrate a process of high voltage and low voltage devices. We can maintain the function of high voltage device and maintain the property of high current in the process. Besides, we can still apply the prior cell library in such a process.
REFERENCES:
patent: 5888869 (1999-03-01), Cho et al.
patent: 6110782 (2000-08-01), Chu et al.
patent: 928030 (1999-07-01), None
Dang Trung
United Microelectronics Corp.
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